BCR42: PCI DATA Register 5 (DATA5) Alias
Register
9-8
D6_SCALE These bits correspond to the
DATA_SCALE field of the PMC-
SR (offset Register 44 of the PCI
configuration space, bits 14-13).
Refer to the description of
DATA_SCALE for the meaning of
this field.
Note: This register is an alias of the DATA register and
also of the DATA_SCALE field of the PCMCR register.
Since these two are read only, BCR42 provides a
means of programming them through the EEPROM.
The contents of this register are copied into the corre-
sponding fields pointed with the DATA_SEL field set to
five. Bits 15-0 in this register are programmable
through the EEPROM.
These bits are always read ac-
cessible. D6_SCALE is read only.
Cleared by H_RESET and is not
affected by S_RESET or setting
the STOP bit
Bit
Name
Description
15-10 RES
Reserved locations. Written as
zeros and read as undefined.
7-0
DATA6
These bits correspond to the PCI
DATA register (offset Register 47
of the PCI configuration space,
bits 7-0). Refer to the description
of DATA register for the meaning
of this field.
9-8
D5_SCALE These bits correspond to the
DATA_SCALE field of the PMC-
SR (offset Register 44 of the PCI
configuration space, bits 14-13).
Refer to the description of
DATA_SCALE for the meaning of
this field.
These bits are always read ac-
cessible. DATA6 is read only.
Cleared by H_RESET and is not
affected by S_RESET or setting
the STOP bit.
These bits are always read ac-
cessible. D5_SCALE is read only.
Cleared by H_RESET and is not
affected by S_RESET or setting
the STOP bit
BCR44: PCI DATA Register 7 (DATA7) Alias
Register
Note: This register is an alias of the DATA register and
also of the DATA_SCALE field of the PCMCR register.
Since these two are read only, BCR44 provides a
means of programming them through the EEPROM.
The contents of this register are copied into the corre-
sponding fields pointed with the DATA_SEL field set to
seven. Bits 15-0 in this register are programmable
through the EEPROM.
7-0
DATA5
These bits correspond to the PCI
DATA register (offset Register 47
of the PCI configuration space,
bits 7-0). Refer to the description
of DATA register for the meaning
of this field.
These bits are always read ac-
cessible. DATA5 is read only.
Cleared by H_RESET and is not
affected by S_RESET or setting
the STOP bit.
Bit
Name
Description
15-10 RES
Reserved locations. Written as
zeros and read as undefined.
BCR43: PCI DATA Register 6 (DATA6) Alias
Register
9-8
D7_SCALE These bits correspond to the
DATA_SCALE field of the PMC-
SR (offset Register 44 of the PCI
configuration space, bits 14-13).
Refer to the description of
DATA_SCALE for the meaning of
this field.
Note: This register is an alias of the DATA register and
also of the DATA_SCALE field of the PCMCR register.
Since these two are read only, BCR43 provides a
means of programming them through the EEPROM.
The contents of this register are copied into the corre-
sponding fields pointed with the DATA_SEL field set to
six. Bits 15-0 in this register are programmable through
the EEPROM.
These bits are always read ac-
cessible. D7_SCALE is read only.
Cleared by H_RESET and is not
affected by S_RESET or setting
the STOP bit.
Bit
Name
Description
15-10 RES
Reserved locations. Written as
zeros and read as undefined.
7-0
DATA7
These bits correspond to the PCI
DATA register (offset register 47
174
Am79C978
AMD [ AMD ]
