D A T A S H E E T
addresses. Once V is removed from the RESET#
pin, all the previously protected sector groups are
Hardware Data Protection
ID
The command sequence requirement of unlock cycles
for programming or erasing provides data protection
against inadvertent writes (refer to the Command Defi-
nitions table). In addition, the following hardware data
protection measures prevent accidental erasure or pro-
gramming, which might otherwise be caused by
protected again. Figure 1 shows the algorithm, and
the Temporary Sector Group Unprotect diagram (Fig-
ure 16) shows the timing waveforms, for this feature.
spurious system level signals during V power-up and
power-down transitions, or from system noise.
CC
START
Low V
Write Inhibit
CC
RESET# = VID
(Note 1)
When V
is less than V
, the device does not ac-
LKO
CC
cept any write cycles. This protects data during V
CC
power-up and power-down. The command register and
all internal program/erase circuits are disabled, and the
Perform Erase or
Program Operations
device resets. Subsequent writes are ignored until V
CC
is greater than V
. The system must provide the
LKO
proper signals to the control pins to prevent uninten-
RESET# = VIH
tional writes when V is greater than V
.
CC
LKO
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE#, CE# or
WE# do not initiate a write cycle.
Temporary
Sector Group Unprotect
Completed (Note 2)
Logical Inhibit
Write cycles are inhibited by holding any one of OE#
Notes:
= V , CE# = V or WE# = V . To initiate a write cy-
IL
IH
IH
1. All protected sector groups unprotected.
cle, CE# and WE# must be a logical zero while OE#
is a logical one.
2. All previously protected sector groups are protected
once again.
Power-Up Write Inhibit
Figure 1. Temporary Sector Group Unprotect
Operation
If WE# = CE# = V and OE# = V during power up, the
IL
IH
device does not accept commands on the rising edge
of WE#. The internal state machine is automatically
reset to reading array data on power-up.
12
Am29F016D
21444E6 November 1, 2006
AMD [ AMD ]
