[AK4679]
■ EXT Slave Mode (PMPLL bit = “0”, M/S bit = “0”) (Audio I/F)
When PMPLL bit is “0”, the audio I/F becomes EXT mode. Master clock is input from the MCKI pin, the internal PLL
circuit is not operated. This mode is compatible with I/F of the normal audio CODEC. The clocks required to operate the
CODEC are MCKI (256fs, 512fs, or 1024fs), LRCK (fs) and BICK (≥32fs). The master clock (MCKI) should be
synchronized with LRCK. The phase between these clocks does not matter. The input frequency of MCKI is selected by
CM1-0 bits (Table 10) and sampling frequency is selected by FS3-0 bits (Table 11).
In case that the CODEC is used without Audio I/F (like phone call), the CODEC can be operated by MCKI only. In this
case, BICK and LRCK can be stopped.
Mode
CM1 bit
CM0 bit
MCKI Input Frequency
Sampling Frequency Range
24kHz ∼ 48kHz
8kHz ∼ 24kHz
0
1
2
3
0
0
1
1
0
1
0
1
256fs
512fs
1024fs
256fs
(default)
8kHz ∼ 12kHz
8kHz ∼ 24kHz
Table 10. MCKI Frequency in EXT Slave Mode (PMPLL bit = “0”, M/S bit = “0”)
FS3 bit
Mode
0
1
2
3
FS2 bit
FS1 bit
FS0 bit
Sampling Frequency
8kHz
0
0
0
0
0
0
1
1
1
0
0
0
0
1
1
0
0
1
0
0
1
1
0
1
1
1
1
0
1
0
1
1
1
0
1
1
12kHz
16kHz
24kHz
11.025kHz
22.05kHz
32kHz
48kHz
44.1kHz
N/A
5
7
10
11
15
Others
(default)
Others
Table 11. Setting of Sampling Frequency (N/A: Not available)
The S/N of the DAC at low sampling frequencies is worse than at high sampling frequencies due to out-of-band noise.
The out-of-band noise can be reduced by using higher frequency of the master clock. The S/N of the DAC output through
LOUT/ROUT pins at fs=8kHz is shown in Table 12.
S/N
MCKI
(fs=8kHz, 20kHzLPF + A-weighted)
256fs
512fs
1024fs
82dB
82dB
92dB
Table 12. Relationship between MCKI and S/N of LOUT/ROUT pins
CODEC
DSP
256fs, 512fs, or
1024fs
MCKI
≥ 32fs
BCLKx
BICK
1fs
SYNCx
LRCK
SDINx
SDTO
SDTI
SDOUTx
Figure 41. EXT Slave Mode (x=1 to 4)
MS1402-E-06
2013/02
- 53 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
