Ambassador T8100A, T8102, and T8105
H.100/H.110 Interfaces and Time-Slot Interchangers
Advance Data Sheet
November 1999
2 Architecture and Functional Description (continued)
2.5 Clocking Section (continued)
2.5.6 MTIE (continued)
2.5.6.3 Using the Bit Slider (continued)
A secondary benefit may come about in T8100A/02/05 applications which use sliding between frames on local ref-
erence inputs. In this case, a board that is mastering an H.100/H.110 system, can pull an entire system slowly into
frame alignment with external trunks, instead of just frequency locking to external trunks.
2.5.7 Clock Fallback
DIAG_ABC = DRIVES A CLOCKS, B CLOCKS,
AND C CLOCKS, NO FALLBACK PERMITTED
DIAG_AB = DRIVES A CLOCKS AND B CLOCKS,
NO FALLBACK PERMITTED
C_ONLY = DRIVES C CLOCKS ONLY,
DIAG_ABC
NO FALLBACK PERMITTED
B_ONLY = DRIVES B CLOCKS,
CAN DRIVE
C CLOCKS IN
FALLBACK CONDITION
A_ONLY = DRIVES A CLOCKS,
DIAG_AB
C_ONLY
CAN DRIVE
C CLOCKS IN
FALLBACK CONDITION
B_MASTER = DRIVES B AND C CLOCKS,
ALL CLOCKS SHUT OFF IN
FALLBACK CONDITION
THE DEVICES ENTER AND
LEAVE THESE STATES
BASED ON REGISTER
COUNTERS
A_MASTER = DRIVES A AND C CLOCKS,
ALL CLOCKS SHUT OFF IN
FALLBACK CONDITION
B_ERROR = NO CLOCKING,
WAITING FOR B CLOCKS TO BE
REPROGRAMMED
DIAGNOSTIC/FORCED CLOCKING
FALLBACK CLOCKING, ASSUMES
FALLBACK ENABLED IN CKS REGISTER
A_ERROR = NO CLOCKING,
WAITING FOR A CLOCKS TO BE
REPROGRAMMED
B CLOCKS FAIL
B_ONLY
INITIAL
B_ERROR
A CLOCKS FAIL
REPROGRAM
B CLOCKS
B CLOCKS FAIL
B_MASTER
A CLOCKS FAIL
A_ERROR
A_ONLY
REPROGRAM
A CLOCKS
B CLOCKS FAIL
A CLOCKS
FAIL
A_MASTER
5-6112F
Figure 17. A, B, and C Clock Fallback State Diagram
Lucent Technologies Inc.
47
AGERE [ AGERE SYSTEMS ]
