Ambassador T8100A, T8102, and T8105
H.100/H.110 Interfaces and Time-Slot Interchangers
Advance Data Sheet
November 1999
2 Architecture and Functional Description (continued)
2.1 Register/Memory Maps (continued)
2.1.3 Address Mode Register
The AMR is defined in Table 10 below where (aaaa) is the stream address and the LAR is the time-slot address of
the selected memory space.
Note: All unused AMR values are reserved.
Table 10. Address Mode Register
Bits
7—4 3—0
Bits
Register Function
0000 0000 Control Registers.
0001 (aaaa) Local Bus, Data Memory 1.
0010 (aaaa) Local Bus, Data Memory 2.
0100 (aaaa) Local Bus, Connection Memory, Time-Slot Field.
0101 (aaaa) Local Bus, Connection Memory, Stream, and Control Bit Field.
0111 0000 Local Bus, Holding Registers, Reset.
1001 0000 CAM, Data Memory 1. Lower 256 Addresses.
1001 0001 CAM, Data Memory 1. Upper 256 Addresses (T8102, T8105 only).
1010 0000 CAM, Data Memory 2. Lower 256 Addresses.
1010 0001 CAM, Data Memory 2. Upper 256 Addresses (T8102, T8105 only).
1011 0000 CAM, Connection, Time-Slot Field.
1011 0001 CAM, Connection, Stream, and Control Bit Field.
1011 0010 CAM, Connection, Tag Field.
1011 0011 CAM, Connection, Subrate Control, Tag Field MSB.
1110 0000 CAM, Even, Make Connection (MKCE). Write to Next Free Location.
1110 0001 CAM, Odd, Make Connection (MKCO). Write to Next Free Location.
1110 0011 CAM, Local, Make Connection (MKCL). Write to Next Free Location.
1110 0100 CAM, Even, Break Connection (BKCE).
1110 0101 CAM, Odd, Break Connection (BKCO).
1110 0111 CAM, Local, Break Connection (BKCL).
1110 1000 CAM, Even, Clear Location (CLLE). Lower 256 Range. Requires LAR.
1100 1000 CAM, Even, Clear Location (CLLE). Upper 256 Range. Requires LAR (T8102, T8105 only).
1110 1001 CAM, Odd, Clear Location (CLLO). Lower 256 Range. Requires LAR.
1100 1001 CAM, Odd, Clear Location (CLLO). Upper 256 Range. Requires LAR (T8102, T8105 only).
1110 1011 CAM, Local, Clear Location (CLLL). Lower 256 Range. Requires LAR.
1100 1011 CAM, Local, Clear Location (CLLL). Upper 256 Range. Requires LAR (T8102, T8105 only).
1110 1100 CAM, Even, Read Location (RDCE). Lower 256 Range. Requires LAR, IDR Holds Results.
1100 1100 CAM, Even, Read Location (RDCE). Upper 256 Range. Requires LAR, IDR Holds Results (T8102, T8105 only).
1110 1101 CAM, Odd, Read Location (RDCO). Lower 256 Range. Requires LAR, IDR Holds Results.
1100 1101 CAM, Odd, Read Location (RDCO). Upper 256 Range. Requires LAR, IDR Holds Results (T8102, T8105 only).
1110 1111 CAM, Local, Read Location (RDCL). Lower 256 Range. Requires LAR, IDR Holds Results.
1100 1111 CAM, Local, Read Location (RDCL). Upper 256 Range. Requires LAR, IDR Holds Results (T8102, T8105 only).
1111 0000 CAM, Even, Find Entry (FENE). IDR Holds Results.
1111 0001 CAM, Odd, Find Entry (FENO). IDR Holds Results.
1111 0011 CAM, Local, Find Entry (FENL). IDR Holds Results.
1111 1000 CAM, Even, Reset (RSCE).
1111 1001 CAM, Odd, Reset (RSCO).
1111 1011 CAM, Local, Reset (RSCL).
1111 1100 CAM, Holding Registers, Reset (RCH).
1111 1111 CAM, Initialize (CI). Reset All CAM Locations and Holding Registers.
16
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