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EVAL-AD5940BIOZ 参数 Datasheet PDF下载

EVAL-AD5940BIOZ图片预览
型号: EVAL-AD5940BIOZ
PDF下载: 下载PDF文件 查看货源
内容描述: [High Precision, Impedance, and Electrochemical Front End]
分类和应用:
文件页数/大小: 130 页 / 1952 K
品牌: ADI [ ADI ]
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Data Sheet  
AD5940  
WAVEFORM GENERATOR REGISTERS  
Table 113. Waveform Generator for High Speed DAC Registers Summary  
Address  
Name  
Description  
Reset  
Access  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
0x00002014  
0x00002018  
0x0000201C  
0x00002020  
0x00002024  
0x00002028  
0x0000202C  
0x00002030  
0x00002034  
0x00002038  
0x0000203C  
WGCON  
Waveform generator configuration register.  
0x00000030  
0x00000000  
0x00000000  
0x00000000  
0x00000000  
0x00000000  
0x00000000  
0x00000000  
0x00000000  
0x00000000  
0x00000000  
WGDCLEVEL1  
WGDCLEVEL2  
WGDELAY1  
WGSLOPE1  
WGDELAY2  
WGSLOPE2  
WGFCW  
WGPHASE  
WGOFFSET  
WGAMPLITUDE  
Waveform generator register, Trapezoid DC Level 1.  
Waveform generator register, Trapezoid DC Level 2.  
Waveform generator register ,Trapezoid Delay 1 time.  
Waveform generator register, Trapezoid Slope 1 time.  
Waveform generator register, Trapezoid Delay 2 time.  
Waveform generator register, Trapezoid Slope 2 time.  
Waveform generator register, sinusoid frequency control word.  
Waveform generator register, sinusoid phase offset.  
Waveform generator register, sinusoid offset.  
Waveform generator register, sinusoid amplitude.  
Waveform Generator Configuration Register—WGCON  
Address 0x00002014, Reset: 0x00000030, Name: WGCON  
Table 114. Bit Descriptions for WGCON Register  
Bits  
Bit Name  
Settings Description  
Reset Access  
[31:6] Reserved  
Reserved  
0x0  
0x1  
R
5
4
DACGAINCAL  
Bypass DAC gain. Use the DAC gain calculated during the Analog Devices  
factory trim and stored in the DACGAIN register.  
Bypass DAC gain correction.  
Perform DAC gain correction.  
R/W  
0
1
DACOFFSETCAL  
Bypass DAC Offset. Use the DAC offset calculated during the calibration routine.  
Bypass DAC offset correction.  
Perform DAC offset correction. The offset value is in the DACOFFSET register and  
the DACOFFSETHS register for low power and high power mode, respectively,  
when LPDACCON0, Bit 0 = 0. The offset value is in the DACOFFSETATTEN register  
and the DACOFFSETATTENHS register for low power and high power mode,  
respectively, when LPDACCON0, Bit 0 = 1.  
0x1  
R/W  
0
1
3
[2:1]  
Reserved  
TYPESEL  
Reserved.  
0x0  
0x0  
R
R/W  
These bits select the type of waveform.  
00 Direct write to the DAC. User code writes to the HSDACDAT register directly.  
10 Sinusoid. Sets the WAVEGENEN bit in the AFECON register to 1. The DAC outputs  
a sine wave.  
11 Trapezoid. Sets the WAVEGENEN bit in the AFECON register to 1. The DAC  
outputs a trapezoid wave.  
0
TRAPRSTEN  
Resets the trapezoid waveform generator. The output restarts from the beginning of  
the Delay 1 period, with an output corresponding to DC Level 1. The reset takes  
effect immediately. After the trapezoid generator is reset, the bit value returns to 0.  
0x0  
W
0
1
Disable reset of the trapezoid waveform generator.  
Enable reset of the trapezoid waveform generator.  
Waveform Generator, Trapezoid DC Level 1 Register—WGDCLEVEL1  
Address 0x00002018, Reset: 0x00000000, Name: WGDCLEVEL1  
Table 115. Bit Descriptions for WGDCLEVEL1 Register  
Bits  
[31:12]  
[11:0]  
Bit Name  
Reserved  
TRAPDCLEVEL1  
Settings  
Description  
Reserved.  
Reset  
0x0  
0x0  
Access  
R
R/W  
DC Level 1 value for trapezoid waveform generation.  
Rev. 0 | Page 93 of 130  
 
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