Data Sheet
AD5940
Interrupt Controller Flag Registers—INTCFLAG0 and INTCFLAG1
Address 0x00003010, Reset: 0x00000000, Name: INTCFLAG0
Address 0x00003014, Reset: 0x00000000, Name: INTCFLAG1
Table 139. Bit Descriptions for INTCFLAG0 and INTCFLAG1 Registers
Bits
Bit Name
Settings Description
Reset Access
31
FLAG31
Attempt to break IRQ status. This bit is set if a Sequence B request arrives when
0x0
R
Sequence A is running, indicating that Sequence B is ignored.
Interrupt not asserted.
Interrupt asserted.
0
1
30
29
Reserved
FLAG29
Reserved.
Outlier IRQ status.
0x0
0x0
R
R
0
1
Interrupt not asserted.
Interrupt asserted.
28
27
Reserved
FLAG27
Reserved.
0x0
0x0
R
R
Data FIFO underflow IRQ status.
Interrupt not asserted.
Interrupt asserted.
0
1
26
25
24
23
FLAG26
FLAG25
FLAG24
FLAG23
Data FIFO overflow IRQ status.
Interrupt not asserted.
Interrupt asserted.
Data FIFO threshold IRQ status.
Interrupt not asserted.
Interrupt asserted.
Data FIFO empty IRQ status.
Interrupt not asserted.
Interrupt asserted.
Data FIFO full IRQ status.
Interrupt not asserted.
Interrupt asserted.
0x0
0x0
0x0
0x0
R
R
R
R
0
1
0
1
0
1
0
1
[22:18] Reserved
Reserved.
0x0
0x0
R
R
17
16
15
FLAG17
FLAG16
FLAG15
Sequencer timeout error IRQ status.
Interrupt not asserted.
Interrupt asserted.
0
1
Sequencer timeout finished IRQ status.
Interrupt not asserted.
Interrupt asserted.
End of sequence IRQ status.
Interrupt not asserted.
Interrupt asserted.
0x0
0x0
R
R
0
1
0
1
14
13
Reserved
FLAG13
Reserved.
0x0
0x0
R
R
Bootload done IRQ status.
Interrupt not asserted.
Interrupt asserted.
0
1
Rev. 0 | Page 107 of 130
ADI [ ADI ]
