Data Sheet
AD5940
Interrupt Controller Select Registers—INTCSEL0 and INTCSEL1
Address 0x00003008, Reset: 0x00002000, Name: INTCSEL0
Address 0x0000300C, Reset: 0x00002000, Name: INTCSEL1
Table 138. Bit Descriptions for INTCSEL0 and INTCSEL1 Registers
Bits
Bit Name
Settings
Description
Reset
Access
31
INTSEL31
Attempt to break IRQ enable.
Interrupt disabled.
Interrupt enabled.
0x0
R/W
0
1
30
29
Reserved
INTSEL29
Reserved.
Outlier IRQ enable.
0x0
0x0
R/W
R/W
0
1
Interrupt disabled.
Interrupt enabled.
28
27
Reserved
INTSEL27
Reserved.
Data FIFO underflow IRQ enable.
Interrupt disabled.
0x0
0x0
R/W
R/W
0
1
Interrupt enabled.
26
25
24
23
INTSEL26
INTSEL25
INTSEL24
INTSEL23
Data FIFO overflow IRQ enable.
Interrupt disabled.
Interrupt enabled.
Data FIFO threshold IRQ enable.
Interrupt disabled.
Interrupt enabled.
Data FIFO empty IRQ enable.
Interrupt disabled.
Interrupt enabled.
0x0
0x0
0x0
0x0
R/W
R/W
R/W
R/W
0
1
0
1
0
1
Data FIFO full IRQ enable.
Interrupt disabled.
Interrupt enabled.
0
1
[22:18]
17
Reserved
INTSEL17
Reserved.
Sequencer timeout error IRQ enable.
Interrupt disabled.
0x0
0x0
R/W
R/W
0
1
Interrupt enabled.
16
15
INTSEL16
INTSEL15
Sequencer timeout finished IRQ enable.
Interrupt disabled.
Interrupt enabled.
End of sequence IRQ enable.
Interrupt disabled.
Interrupt enabled.
0x0
0x0
R/W
R/W
0
1
0
1
14
13
Reserved
INTSEL13
Reserved.
Bootloader done IRQ enable.
Interrupt disabled.
0x0
0x1
R/W
R/W
0
1
Interrupt enabled.
Rev. 0 | Page 105 of 130
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