ADV7170/ADV7171
TR17
TR16
TR15
TR14
TR13
TR12
TR11
TR10
HSYNC WIDTH
HSYNC TO PIXEL
DATA ADJUST
HSYNC TO
FIELD/VSYNC DELAY
HSYNC TO FIELD
RISING EDGE DELAY
(MODE 1 ONLY)
T
TR11 TR10
A
TR17 TR16
T
TR13 TR12
B
0
0
1
1
0
1
0
1
1 × T
4 × T
PCLK
T
TR15 TR14
C
0
0
1
1
0
1
0
1
0 × T
1 × T
2 × T
3 × T
0
0
1
1
0
1
0
1
0 × T
4 × T
8 × T
PCLK
PCLK
PCLK
PCLK
PCLK
x
x
0
1
T
T
B
16 × T
PCLK
PCLK
PCLK
PCLK
+ 32μs
B
128 × T
PCLK
16 × T
PCLK
VSYNC WIDTH
(MODE 2 ONLY)
TR15 TR14
0
0
1
1
0
1
0
1
1 × T
4 × T
PCLK
PCLK
16 × T
PCLK
128 × T
PCLK
TIMING MODE 1 (MASTER/PAL)
LINE 1
LINE 313
LINE 314
T
HSYNC
A
T
C
T
B
FIELD/VSYNC
Figure 44. Timing Register 1
SUBCARRIER FREQUENCY REGISTERS 0 TO 3
(FSC3 TO FSC0)
SUBCARRIER PHASE REGISTERS (FP7 TO FP0)
(Address [SR4 to SR0] = 0DH)
(Address [SR4 to SR00] = 09H to 0CH)
This 8-bit-wide register is used to set up the subcarrier phase.
Each bit represents 1.41°. For normal operation this register is
set to 00Hex.
These 8-bit-wide registers are used to set up the subcarrier
frequency. The value of these registers is calculated by using
the following equation, rounded to the nearest integer:
CLOSED CAPTIONING EVEN FIELD DATA
REGISTER 1 TO 0 (CED15 TO CED0)
(Address [SR4–SR0] = 0E to 0FH)
No.of Subcarrier Frequency ValuesinOne Lineof Video Line
No.of 27MHzClock Cyclesin OneVideoLine
× 232
These 8-bit-wide registers are used to set up the closed
captioning extended data bytes on even fields. Figure 46
shows how the high and low bytes are set up in the registers.
For example, in NTSC mode,
227.5
Subcarrier FrequencyValue =
× 232 = 569408542d = 21F07C1Fh
1716
CED15 CED14 CED13 CED12 CED11 CED10 CED9 CED8
BYTE 1
Note that on power-up, FSC Register 0 is set to 16h. A value of 1F
as derived above is recommended.
CED7 CED6 CED5 CED4 CED3 CED2 CED1 CED0
BYTE 0
Figure 46. Closed Captioning Extended Data Register
Program as follows:
FSC Register 0: 1FH
FSC Register 2: 7CH
FSC Register 3: F0H
FSC Register 4: 21H
CLOSED CAPTIONING ODD FIELD DATA
REGISTERS 1 TO 0 (CCD15 TO CCD0)
(Subaddress [SR4 to SR0] = 10H to 11H)
These 8-bit-wide registers are used to set up the closed
captioning data bytes on odd fields. Figure 47 shows how the
high and low bytes are set up in the registers.
Figure 45 shows how the frequency is set up by the four registers.
SUBCARRIER
FREQUENCY FSC7 FSC6 FSC5
REG 0
FSC4
FSC3 FSC2 FSC1 FSC0
CCD15 CCD14 CCD13 CCD12 CCD11 CCD10 CCD9 CCD8
BYTE 1
SUBCARRIER
FREQUENCY
REG 1
FSC15 FSC14 FSC13 FSC12 FSC11 FSC10 FSC9 FSC8
CCD7 CCD6 CCD5 CCD4 CCD3 CCD2 CCD1 CCD0
BYTE 0
SUBCARRIER
FREQUENCY FSC23 FSC22 FSC21 FSC20 FSC19 FSC18 FSC17 FSC16
REG 2
Figure 47. Closed Captioning Data Register
SUBCARRIER
FREQUENCY FSC31 FSC30 FSC29 FSC28 FSC27 FSC26 FSC25 FSC24
REG 3
Figure 45. Subcarrier Frequency Register
Rev. C | Page 35 of 64
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