ADV7170/ADV7171
APPENDICES
Supply Decoupling
APPENDIX 1—BOARD DESIGN
AND LAYOUT CONSIDERATIONS
For optimum performance, bypass capacitors should be
installed using the shortest leads possible, consistent with
reliable operation, to reduce the lead inductance. Best
performance is obtained with 0.1 μF ceramic capacitor
decoupling. Each group of VAA pins on the ADV7170/
ADV7171 must have at least one 0.1 μF decoupling capacitor
to GND. These capacitors should be placed as close as possible
to the device.
The ADV7170/ADV7171 are highly integrated circuits
containing both precision analog and high speed digital
circuitry. They have been designed to minimize interference
effects of the high speed digital circuitry on the integrity of the
analog circuitry. It is imperative that these same design and
layout techniques be applied to the system level design so that
high speed, accurate performance is achieved. Figure 54 shows
the analog interface between the device and monitor.
It is important to note that while the ADV7170/ADV7171
contain circuitry to reject power supply noise, this rejection
decreases with frequency. If a high frequency switching power
supply is used, the designer should pay close attention to
reducing power supply noise and consider using a three-
terminal voltage regulator for supplying power to the analog
power plane.
The layout should be optimized for lowest noise on the
ADV7170/ADV7171 power and ground lines by shielding the
digital inputs and providing good decoupling. The lead length
between groups of VAA and GND pins should be minimized to
minimize inductive ringing.
Ground Planes
Digital Signal Interconnect
The ground plane should encompass all ADV7170/ADV7171
ground pins, voltage reference circuitry, power supply bypass
circuitry for the ADV7170/ADV7171, the analog output traces,
and all the digital signal traces leading up to the ADV7170/
ADV7171. The ground plane is the board’s common ground
plane.
The digital inputs to the ADV7170/ADV7171 should be isolated
as much as possible from the analog outputs and other analog
circuitry. Also, these input signals should not overlay the analog
power plane.
Due to the high clock rates involved, long clock lines to the
ADV7170/ADV7171 should be avoided to reduce noise pickup.
Power Planes
The ADV7170, the ADV7171, and any associated analog
circuitry should each have its own power plane, referred to
as the analog power plane (VAA). This power plane should be
connected to the regular PCB power plane (VCC) at a single
point through a ferrite bead. This bead should be located within
three inches of the ADV7170/ADV7171.
Any active termination resistors for the digital inputs should be
connected to the regular PCB power plane (VCC) and not to the
analog power plane.
Analog Signal Interconnect
The ADV7170/ADV7171 should be located as close as possible
to the output connectors to minimize noise pickup and
reflections due to impedance mismatch.
The metallization gap separating device power plane and board
power plane should be as narrow as possible to minimize the
obstruction to the flow of heat from the device into the general
board.
The video output signals should overlay the ground plane, not
the analog power plane, to maximize the high frequency power
supply rejection.
The PCB power plane should provide power to all digital logic
on the PC board, and the analog power plane should provide
power to all ADV7170/ADV7171 power pins and voltage
reference circuitry.
Digital inputs, especially pixel data inputs and clocking signals,
should never overlay any of the analog signal circuitry and
should be kept as far away as possible.
For best performance, the outputs should each have a 75 Ω load
resistor connected to GND. These resistors should be placed as
close as possible to the ADV7170/ADV7171 to minimize
reflections.
Plane-to-plane noise coupling can be reduced by ensuring that
portions of the regular PCB power and ground planes do not
overlay portions of the analog power plane unless they can be
arranged so that the plane-to-plane noise is common-mode.
The ADV7170/ADV7171 should have no inputs left floating.
Any inputs that are not required should be tied to ground.
Rev. C | Page 38 of 64
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