欢迎访问ic37.com |
会员登录 免费注册
发布采购

AD7769JP 参数 Datasheet PDF下载

AD7769JP图片预览
型号: AD7769JP
PDF下载: 下载PDF文件 查看货源
内容描述: LC2MOS模拟量I / O端口 [LC2MOS Analog I/O Port]
分类和应用:
文件页数/大小: 16 页 / 267 K
品牌: AD [ ANALOG DEVICES ]
 浏览型号AD7769JP的Datasheet PDF文件第1页浏览型号AD7769JP的Datasheet PDF文件第3页浏览型号AD7769JP的Datasheet PDF文件第4页浏览型号AD7769JP的Datasheet PDF文件第5页浏览型号AD7769JP的Datasheet PDF文件第6页浏览型号AD7769JP的Datasheet PDF文件第7页浏览型号AD7769JP的Datasheet PDF文件第8页浏览型号AD7769JP的Datasheet PDF文件第9页  
ADC SPECIFICATIONS
Parameter
DC ACCURACY
Resolution
Relative Accuracy
Differential Nonlinearity
Bias Offset Error
+25°C
T
MIN
to T
MAX
Bias Offset Match
+25°C
T
MIN
to T
MAX
Plus or Minus Full-Scale Error
+25°C
T
MIN
to T
MAX
Plus or Minus Full-Scale Match
+25°C
T
MIN
to T
MAX
ADC TO DAC MATCHING
Bias Offset Match
+25°C
T
MIN
to T
MAX
Plus or Minus Full-Scale Match
+25°C
T
MIN
to T
MAX
AD7769–SPECIFICATIONS
V
(V = +12 V 10%;
DD
= +5 V 5%; AGND [ADC] = AGND [DAC] = DGND = 0 V; V
BIAS
[ADC] = +5 V;
V
SWING
[ADC] = +2.5 V; f
CLK
= 5 MHz external. All specifications T
MIN
to T
MAX1
unless otherwise noted.)
CC
J Version
8
±
1
±
1
±
2.5
±
3.0
±
2.5
±
3.5
±
2.0
±
2.5
±
3.5
±
4
A Version Units
*
*
*
*
*
*
*
*
*
*
*
Bits
LSB max
LSB max
LSB max
LSB max
Conditions/Comments
See Terminology
No Missing Codes. See Terminology.
See Terminology
Channel A to Channel B
LSB max
LSB max
See Terminology
LSB max
LSB max
Channel A to Channel B
LSB max
LSB max
Channel A/B to V
OUT
A/B
V
BIAS
(DAC) = +5 V, V
SWING
(DAC) = +2.5 V.
*
*
*
*
*
*
*
*
LSB max
LSB max
LSB max
LSB max
dB min
dB max
dB typ
dB typ
V min
V max
mA max
V
IN
= 100 kHz Full-Scale Sine Wave with f
SAMPLING
= 400 kHz
V
IN
= 100 kHz Full-Scale Sine Wave with f
SAMPLlNG
= 400 kHz
f
a
= 99 kHz, f
b
= 96.7 kHz with f
SAMPLING
= 400 kHz
V
IN
= Full-Scale, dc to 200 kHz Sine Wave
Whichever Is the Higher
Whichever Is the Lower
±
2.5
±
3.5
±
3.5
±
4.0
44
48
60
0.1
DYNAMIC PERFORMANCE
2
Signal-to-Noise Ratio (SNR)
Total Harmonic Distortion (THD)
Intermodulation Distortion (IMD)
Frequency Response
ANALOG INPUTS
Input Voltage Ranges, V
IN
A, V
IN
B V
BIAS
– V
SWING
or 0
V
BIAS
+ V
SWING
or 9.8
Input Currents, I
IN
A, I
IN
B
±
0.4
*
ADC REFERENCE INPUTS
Input Voltage Levels
V
BIAS
(ADC)
V
SWING
(ADC)
Input Currents
V
BIAS
(ADC) Input
V
SWING
(ADC) Input
LOGIC OUTPUTS
DB0–DB7,
INT
V
OL
, Output Low Voltage
V
OH
, Output High Voltage
DB0–DB7
Floating State Leakage Current
Floating State Capacitance
2
Output Coding
POWER REQUIREMENTS
V
CC
Range
V
DD
Range
I
DD
@ +25°C
V
UB
Am V
IN
B = T
MIN
to T
MAX
I
CC
@ +25°C
T
MIN
to T
MAX
2/6.8
2.0/3.0
±
800
±
1
*
*
*
*
V min/max
V min/max
µA
max
µA
max
With Respect to AGND (ADC). For Specified Performance.
With Respect to AGND (ADC). For Specified Performance.
0.4
4.0
±
10
10
*
*
*
*
Offset Binary
*
*
*
*
*
*
V max
V min
µA
max
pF max
I
SINK
= 1.6 mA
I
SOURCE
= 200
µA
4.75/5.25
10.8/13.2
20
22
5
6
V min/V max For Specified Performance. The Part Will Function with
V
CC
=5 V
±
10% with Degraded Performance.
V min/V max For Specified Performance
mA max
For ADC and DAC: V
BIAS
= 5.0 V; V
SWING
= 3.0 V; V
IN
A,
mA max
V
BIAS
; DAC Code = FF (Hex); DACA and DACB Load = 5 kΩ
to AGND (DAC). Typically I
DD
= 14 mA.
mA max
Logic Inputs = 2.4 V, CLK Input = 0.8 V. Typically I
CC
= 1.5 mA.
mA max
NOTES
1
Temperature range as follows: J Version: 0°C to +70°C; A Version: –40°C to +85°C.
2
Sample tested at +25°C to ensure compliance.
*Specification same as J Version.
Specifications subject to change without notice.
–2–
REV. A