AD7575
PIN CONFIGURATIONS
DIP/SOIC
TP
LCCC
V
REF
V
DD
RD
CS
PLCC
V
REF
19
18
AIN
17
AGND
16
DB0 (LSB)
15
DB1
14
DB2
9
10
11
12
13
CS
1
RD
2
TP
3
BUSY
4
CLK
5
18
V
DD
17
V
REF
16
AIN
3
2
1
20 19
3
2
1
AD7575
15
AGND
BUSY
4
CLK
5
DB7 (MSB)
6
DB6
7
DB5
8
9
18
AIN
TP
4
BUSY
5
CLK
6
DB7 (MSB)
7
DB6
8
PIN 1
IDENTIFIER
AD7575
TOP VIEW
(Not to Scale)
17
AGND
16
DB0 (LSB)
15
DB1
14
DB2
TOP VIEW
14
DB0 (LSB)
(Not to Scale)
13
DB1
DB7 (MSB)
6
DB6
7
DB5
8
DGND
9
12
DB2
11
DB3
10
DB4
AD7575
TOP VIEW
(Not to Scale)
10 11 12 13
NC
NC
DB4
DGND
DB3
NC
DB4
V
DD
20
RD
NC
CS
DB5
NC = NO CONNECT
NC = NO CONNECT
ORDERING GUIDE
Model
1
Temperature
Range
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
–25°C to +85°C
–25°C to +85°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
Relative
Accuracy
(LSB)
±
1 max
±
1 max
±
1/2 max
±
1 max
±
1/2 max
±
1 max
±
1/2 max
±
1 max
±
1/2 max
±
1 max
±
1/2 max
TERMINOLOGY
LEAST SIGNIFICANT BIT (LSB)
Package
Options
2
R-18
N-18
N-18
P-20A
P-20A
Q-18
Q-18
Q-18
Q-18
E-20A
E-20A
An ADC with 8-bits resolution can resolve 1 part in 2
8
(i.e.,
256) of full scale. For the AD7575 with +2.46 V full-scale one
LSB is 9.61 mV.
TOTAL UNADJUSTED ERROR
AD7575JR
AD7575JN
AD7575KN
AD7575JP
AD7575KP
AD7575AQ
AD7575BQ
AD7575SQ
AD7575TQ
AD7575SE
AD7575TE
This is a comprehensive specification that includes full-scale
error, relative accuracy and offset error.
RELATIVE ACCURACY
Relative Accuracy is the deviation of the ADC’s actual code
transition points from a straight line drawn between the devices
measured first LSB transition point and the measured full-scale
transition point.
SNR
NOTES
1
To order MIL-STD-883, Class B process parts, add /883B to part number.
Contact local sales office for military data sheet. For U.S. Standard Military
Drawing (SMD), see DESC drawing #5962-87762.
2
E = Leadless Ceramic Chip Carrier; N = Plastic DIP; P = Plastic Leaded Chip
Carrier; Q = Cerdip, R = SOIC.
Signal-to-Noise Ratio (SNR) is the ratio of the desired signal to
the noise produced in the sampled and digitized analog signal.
SNR is dependent on the number of quantization levels used in
the digitization process; the more levels, the smaller the quantiza-
tion noise. The theoretical SNR for a sine wave input is given by
SNR
= (6.02
N
+ 1.76)
dB
where
N
is the number of bits in the ADC.
FULL-SCALE ERROR (GAIN ERROR)
The gain of a unipolar ADC is defined as the difference between
the analog input levels required to produce the first and the last
digital output code transitions. Gain error is a measure of the
deviation of the actual span from the ideal span of FS – 2 LSBs.
ANALOG INPUT RANGE
With V
REF
= +1.23 V, the maximum analog input voltage range
is 0 V to +2.46 V. The output data in LSBs is related to the
analog input voltage by the integer value of the following
expression:
Data (LSBs) =
2
V
+
0.5
REF
SLEW RATE
256
AIN
Slew Rate is the maximum allowable rate of change of input
signal such that the digital sample values are not in error. Slew
Rate limitations may restrict the analog signal bandwidth for
full-scale analog signals below the bandwidth allowed from
sampling theorem considerations.
–4–
REV. B
DGND
DB3
AD [ ANALOG DEVICES ]
