(VDD = +5 V, VREF = +1.23 V, AGND = DGND = 0 V; fCLK = 4 MHz external;
AD7575–SPECIFICATIONS all specifications TMIN to TMAX unless otherwise noted)
Parameter
J, A Versions1 K, B Versions S Version T Version
Units
Conditions/Comments
ACCURACY
Resolution
8
8
8
8
Bits
Total Unadjusted Error
Relative Accuracy
Minimum Resolution for Which
No Missing Codes Is Guaranteed
Full-Scale Error
±2
±1
±1
±1/2
±2
±1
±1
±1/2
LSB max
LSB max
8
8
8
8
Bits max
+25°C
±1
±1
±1
±1
±1
±1
±1
±1
LSB max Full-Scale TC Is Typically 5 ppm/°C
LSB max
T
MIN to TMAX
Offset Error2
+25°C
±1/2
±1/2
±1/2
±1/2
±1/2
±1/2
±1/2
±1/2
LSB max Offset TC Is Typically 5 ppm/°C
LSB max
TMIN to TMAX
ANALOG INPUT
Voltage Range
DC Input Impedance
Slew Rate, Tracking
SNR3
0 to 2 VREF
10
0.386
45
0 to 2 VREF
10
0.386
45
0 to 2 VREF 0 to 2 VREF
Volts
1 LSB = 2 VREF/256; See Figure 16
10
10
MΩ min
V/µs max
dB min
0.386
45
0.386
45
VIN = 2.46 V p-p @ 10 kHz; See Figure 11
REFERENCE INPUT
V
IREF
REF (For Specified Performance)
1.23
500
1.23
500
1.23
500
1.23
500
Volts
µA max
±5%
LOGIC INPUTS
CS, RD
VINL, Input Low Voltage
0.8
2.4
0.8
2.4
0.8
2.4
0.8
2.4
V max
V min
VINH, Input High Voltage
IIN, Input Current
+25°C
±1
±10
10
±1
±10
10
±1
±10
10
±1
±10
10
µA max
µA max
pF max
VIN = 0 or VDD
VIN = 0 or VDD
TMIN to TMAX
CIN, Input Capacitance3
CLK
VlNL, Input Low Voltage
VINH, Input High Voltage
IINL, Input Low Current
IINH, Input High Current
0.8
2.4
700
700
0.8
2.4
700
700
0.8
2.4
800
800
0.8
2.4
800
800
V max
V min
µA max
µA max
VINL = 0 V
VINH = VDD
LOGIC OUTPUTS
BUSY, DB0 to DB7
VOL, Output Low Voltage
VOH, Output High Voltage
DB0 to DB7
0.4
4.0
0.4
4.0
0.4
4.0
0.4
4.0
V max
V min
ISINK = 1.6 mA
ISOURCE = 40 µA
Floating State Leakage Current
±1
±1
10
±10
10
±10
10
µA max
pF max
VOUT = 0 to VDD
Floating State Output Capacitance3 10
CONVERSION TIME4
With External Clock
5
5
5
5
µs
fCLK = 4 MHz
With Internal Clock, TA = +25°C
5
15
5
15
5
15
5
15
µs min
µs max
Using Recommended Clock
Components Shown in Figure 15
POWER REQUIREMENTS5
VDD
IDD
+5
6
15
+5
6
15
+5
7
15
+5
7
15
Volts
mA max
mW typ
±5% for Specified Performance
Typically 3 mA with VDD = +5 V
Power Dissipation
Power Supply Rejection
±1/4
±1/4
±1/4
±1/4
LSB max 4.75 V ≤ VDD ≤ 5.25 V
NOTES
1Temperature ranges are as follows:
J, K Versions; 0°C to +70°C
A, B Versions; –25°C to +85°C
S, T Versions; –55°C to +125°C
2Offset error is measured with respect to an ideal first code transition that occurs at 1/2 LSB.
3Sample tested at +25°C to ensure compliance.
4Accuracy may degrade at conversion times other than those specified.
5Power supply current is measured when AD7575 is inactive i.e., when CS = RD = BUSY = logic HIGH.
Specifications subject to change without notice.
–2–
REV. B
ADI [ ADI ]
