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AD7575KP 参数 Datasheet PDF下载

AD7575KP图片预览
型号: AD7575KP
PDF下载: 下载PDF文件 查看货源
内容描述: 5 LC2MOS我们8位ADC,带有采样/保持 [LC2MOS 5 us 8-Bit ADC with Track/Hold]
分类和应用:
文件页数/大小: 12 页 / 149 K
品牌: AD [ ANALOG DEVICES ]
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AD7575–SPECIFICATIONS
Parameter
ACCURACY
Resolution
Total Unadjusted Error
Relative Accuracy
Minimum Resolution for Which
No Missing Codes Is Guaranteed
Full-Scale Error
+25°C
T
MIN
to T
MAX
Offset Error
2
+25°C
T
MIN
to T
MAX
ANALOG INPUT
Voltage Range
DC Input Impedance
Slew Rate, Tracking
SNR
3
REFERENCE INPUT
V
REF
(For Specified Performance)
I
REF
LOGIC INPUTS
CS, RD
V
INL
, Input Low Voltage
V
INH
, Input High Voltage
I
IN
, Input Current
+25°C
T
MIN
to T
MAX
C
IN
, Input Capacitance
3
CLK
V
lNL
, Input Low Voltage
V
INH
, Input High Voltage
I
INL
, Input Low Current
I
INH
, Input High Current
LOGIC OUTPUTS
BUSY,
DB0 to DB7
V
OL
, Output Low Voltage
V
OH
, Output High Voltage
DB0 to DB7
Floating State Leakage Current
Floating State Output Capacitance
3
CONVERSION TIME
4
With External Clock
With Internal Clock, T
A
= +25°C
POWER REQUIREMENTS
5
V
DD
I
DD
Power Dissipation
Power Supply Rejection
8
±
2
±
1
8
±
1
±
1
±
1/2
±
1/2
0 to 2 V
REF
10
0.386
45
1.23
500
(V
DD
= +5 V, V
REF
= +1.23 V, AGND = DGND = 0 V; f
CLK
= 4 MHz external;
all specifications T
MIN
to T
MAX
unless otherwise noted)
S Version
8
±
2
±
1
8
±
1
±
1
±
1/2
±
1/2
0 to 2 V
REF
10
0.386
45
1.23
500
T Version
8
±
1
±
1/2
8
±
1
±
1
±
1/2
±
1/2
0 to 2 V
REF
10
0.386
45
1.23
500
Units
Bits
LSB max
LSB max
Bits max
LSB max
LSB max
LSB max
LSB max
Volts
MΩ min
V/µs max
dB min
Volts
µA
max
Full-Scale TC Is Typically 5 ppm/°C
Conditions/Comments
J, A Versions
1
K, B Versions
8
±
1
±
1/2
8
±
1
±
1
±
1/2
±
1/2
0 to 2 V
REF
10
0.386
45
1.23
500
Offset TC Is Typically 5 ppm/°C
1 LSB = 2 V
REF
/256; See Figure 16
V
IN
= 2.46 V p-p @ 10 kHz; See Figure 11
±
5%
0.8
2.4
±
1
±
10
10
0.8
2.4
700
700
0.8
2.4
±
1
±
10
10
0.8
2.4
700
700
0.8
2.4
±
1
±
10
10
0.8
2.4
800
800
0.8
2.4
±
1
±
10
10
0.8
2.4
800
800
V max
V min
µA
max
µA
max
pF max
V max
V min
µA
max
µA
max
V
IN
= 0 or V
DD
V
IN
= 0 or V
DD
V
INL
= 0 V
V
INH
= V
DD
0.4
4.0
±
1
10
5
5
15
+5
6
15
±
1/4
0.4
4.0
±
1
10
5
5
15
+5
6
15
±
1/4
0.4
4.0
±
10
10
5
5
15
+5
7
15
±
1/4
0.4
4.0
±
10
10
5
5
15
+5
7
15
±
1/4
V max
V min
µA
max
pF max
µs
µs
min
µs
max
Volts
mA max
mW typ
LSB max
I
SINK
= 1.6 mA
I
SOURCE
= 40
µA
V
OUT
= 0 to V
DD
f
CLK
= 4 MHz
Using Recommended Clock
Components Shown in Figure 15
±
5% for Specified Performance
Typically 3 mA with V
DD
= +5 V
4.75 V
V
DD
5.25 V
NOTES
1
Temperature ranges are as follows:
J, K Versions; 0°C to +70°C
A, B Versions; –25°C to +85°C
S, T Versions; –55°C to +125°C
2
Offset error is measured with respect to an ideal first code transition that occurs at 1/2 LSB.
3
Sample tested at +25°C to ensure compliance.
4
Accuracy may degrade at conversion times other than those specified.
5
Power supply current is measured when AD7575 is inactive i.e., when
CS
=
RD
=
BUSY
= logic HIGH.
Specifications subject to change without notice.
–2–
REV. B