BRIGHT
Microelectronics
Inc.
Preliminary BM29F040
Embedded Erase Algorithm
Start
Write Program Command Sequence
(see below)
Data poll Device
No
Data = FFH
?
Yes
Erasure
Completed
Figure 3. Embedded Programming Algorithm
Note: See Data Polling Algorithm in Figure 5
Chip Erase Command Sequence
(Address/Data)
Individual Sector/Multiple Sector Erase
Command Sequence (Address/Data)
First Write cycle
5555H/ AAH
2AAAH/ 55H
5555H/ 80H
5555H/ AAH
2AAAH/ 55H
First Write cycle
5555H/ AAH
2AAAH/ 55H
5555H/ 80H
5555H/ AAH
2AAAH/ 55H
5555H/ 10H
Second Write cycle
Third Write cycle
Second Write cycle
Third Write cycle
Fourth Write cycle
Fifth Write cycle
Sixth Write cycle
Fourth Write cycle
Fifth Write cycle
Sixth Write cycle
Sector Address/ 30H
Sector Address/ 30H
Sector Address/ 30H
Additional
Sector erase
commands are
optional
Figure 4. Automated Erase Flow Chart and Sequence
A Winbond Company
Publication Release Date: June 1999
Revision A1
- 15 -
WINBOND [ WINBOND ]
