EAGLE
PRELIMINARY
Ver 1.3
3.10.3 System PLL Program Register (SPLLPMN)
Address : FFE0 2008h
Bit
R/W
R
R/W
R/W
R/W
Description
Default Value
31 : 16
15 : 14
13 : 8
7 : 0
Reserved
-
Output frequency scaler value 2 bits (P)
Reference input frequency divider value 6 bits (M)
VCO frequency divider value 8 bits (N)
01b
02h
30h
Frequency equation : CLK_OUT = CLK_IN x (N+8) / ( (M+2) x 2^P )
Reference input frequency : Fin = 14.318MHz
Example : P = 01b, M = 000010b, N = 00110000 (100Mhz)
Output Frequency Table
Sample Frequency Coefficient ( Reference input frequency = 14.318MHz )
Fout (MHz)
50.1130
50.1130
50.1130
50.1130
N
6
69
M
2
9
7
5
P
0
1
2
3
0
2
1
1
1
0
0
1
1
0
0
0
1
1
SPLLPMN[15:0]
0206h
4945h
8776h
118
188
244
244
217
233
182
87
231
138
230
161
138
193
210
219
C5BCh
3AF4h
8DF4h
55D9h
55E9h
4FB6h
0E57h
24E7h
498Ah
4FE6h
15A1h
118Ah
17C1h
60.13560
60.13560
70.03369
75.01386
80.01235
85.01312
90.05268
95.01945
100.2260
105.2061
110.0225
115.1167
120.0509
125.0071
58
13
21
21
15
14
36
9
15
21
17
23
11
11
4BD2h
4BDBh
Table 3-15 Frequency by P, M, N value of SPLL
* Table 3-15 shows the value of P, M, N values in decimal unit
SPLLPMN value is shown in hexadecimal unit.
Beijing Peak Microtech Co.Ltd.
CONFIDENTIAL
110
ETC [ ETC ]
