ADM7008
Interface Description
Pin #
Pin Name
Type Pin Description
CRSDV_P0 is asserted for the duration of carrier activity for a
false carrier event.
SMII/SS_SMII
Mode
Not Used.
Not used in SMII and SS_SMII Mode
N/A
RMII Mode
TXD[1:0]_P0
108, 109
I,
Port 0 RMII Transmit Data. Transmit data for port 1 inputs the
TTL, di-bits that re transmitted and are driven synchronously to
PD
REFCLK. Note that in 100Mb/s mode, TXD can change once
per REFCLK cycle, whereas in 10Mb/s mode, TXD must be
held steady for 10 consecutive REFCLK cycles.
SMII Mode
Link and Activity LED/Port 0 SMII Transmit Data. TXD0 for port
0 inputs the data that is transmitted and is driven synchronously
to SMII_REFCLK (pin 70). In 100Mb/s mode, TXD0 inputs a
new 10-bit segment starting with SYNC. In 10Mb/s mode,
TXD0 must repeat each 10-bit segment 10 times.
LNKACT_P0,
SMII_TXD_P0
TXD1_P0 acts as Port 0 Link/Activity LED in both SMII and
SS_SMII Mode. See LED Description for more detail.
Link and Activity LED/Port 0 SS_SMII Transmit Data. TXD0 for
port 1 inputs the data that is transmitted and is driven
SS_SMII Mode
LNKACT_P0,
synchronously to TXCLK (pin 70). In 100Mb/s mode, TXD0
inputs a new 10-bit segment starting with SYNC. In 10Mb/s
mode, TXD0 must repeat each 10-bit segment 10 times.
Port 0 Transmit Enable. Transmit Enable for port 0 indicates
SSSMII_TXD_P0
RMII Mode
TXEN_P0
110
I,
TTL that the di-bit on TXD is valid and it is driven synchronously to
REFCLK.
SMII/SS_SMII
LOW
Not Used. Tied to LOW for normal operation in SMII/SS_SMII
mode.
2.2.7 ATPG Signals, 2 pins
Pin #
Pin Name
Type Description
114
SCAN_EN
I
SCAN_EN: Scan enable for test 0: Normal mode
VLTTL
I
113
SCAN_MODE
SCAN_MODE: Scan mode select for test 0: Normal mode
VLTTL
2.2.8 Reset Pin
Pin #
Pin Name
Type Description
47
RESET#
I,
Reset Signal. Active low to bring ADM7008 into reset
SCHE condition. Recommend keeping low for at least 200 ms to
ensure the stability of the system after power on reset.
2.2.9 Control Signals, 3 pins
Pin #
Pin Name
Type Pin Description
101
MDIO
I/O,
Management Data. MDIO transfers management data in and
LVTTL out of the device synchronous to MDC.
102
MDC
I,
Management Data Reference Clock. A non-continuous clock
LVTTL input for management usage. ADM7008 will use this clock to
sample data input on MDIO and drive data onto MDIO
ADMtek Inc.
2-16
ETC [ ETC ]
