ADM7008
Interface Description
Pin #
Pin Name
Type Pin Description
Power On
59, 60
I
REC_10M: Value on RXD1_P6 will be latched by ADM7008
Setting
PD,
PD,
during power on reset as Port 6 10M Re-command value.
REC_10M_P6,
DUALLED
0: Recommend Port 6 to operate in 100M Mode
1: Recommend Port 6 to operate in 10M Mode
Dual Color LED Mode. Value on RXD0_P6 will be latched by
ADM7008 during power on reset to form LED control signal.
Value on this pin will affect the output value on Serial LED
output.
0: Single Color 3 bits/port serial stream (Default Value)
1: Dual Color 3 bits/port serial stream
O,
Port 6 RMII Receive Data. RXD[1:0] are the port 6 output di-
RMII Mode
8mA bits synchronously to REFCLK. Upon assertion of CRSDV_P,
RXD0 and RXD1 remain at 00 until valid data is output from the
FIFO onto RXD. The start of valid data is indicated by 01 on
RXD1 and RXD0. If a false carrier or a symbol error is
detected, RXD1 and RXD0 are set to 10 for the duration of the
activity. Note that in 100Mb/s mode RXD can change once per
REFCLK cycle, whereas in 10Mb/s mode RXD must be held
steady for 10 consecutive REFCLK cycles.
RXD[1:0]_P6
SMII Mode
O,
Port 6 SMII Receive Data. RXD0 for the designated port
SPDLED_P6,
SMII_RXD_P6
8mA outputs data or in-band management information
synchronously to SMII REFCLK (pin 70). In 100Mb/s mode,
RXD0 outputs a new 10-bit segment starting with SYNC. In
10Mb/s mode, RXD0 must repeat each 10 bits segment 10
times. RXD1 for the designated port is acted as Speed Status
LED for port 6.
O,
Port 6 SS_SMII Receive Data. RXD0 for the designated port
SS_SMII Mode
SPDLED_P6,
SSSMII_RXD_P
6
8mA outputs data or in-band management information
synchronously to RXCLK (pin 75). In 100Mb/s mode, RXD0
outputs a new 10-bit segment starting with SYNC. In 10Mb/s
mode, RXD0 must repeat each 10 bits segment 10 times.
RXD1 for the designated port is acted as Speed Status LED for
port 6.
Power On
Setting
61
I,
RMII/SMII/SS_SMII Configuration bit 0. Value on this pin will
LVTTL, be latched by ADM7008 during power on reset as interface
RSMODE0
PD
configuration bit 0. Combined with RSMODE1 (pin 43), three
possible interfaces are provided by ADM7008
RSMODE[1:0] Interface
00
01
1x
SMII
SS_SMII
RMII
O,
Port 6 Carrier Sense/Receive Data Valid. CRSDV_P6 asserts
RMII Mode
CRSDV_P6
8mA when the receive medium is non-idle. The assertion of
CRSDV_P6 is asynchronous to REFCLK. At the de-assertion
of carrier, CRSDV_P6 de-asserts synchronously to REFCLK
only on the first di-bit of RXD. If there is still data in the FIFO
not yet presented onto RXD, then on the second di-bit of RXD,
ADMtek Inc.
2-5
ETC [ ETC ]
