ST72104G, ST72215G, ST72216G, ST72254G
SERIAL PERIPHERAL INTERFACE (Cont’d)
12.3.5 Low Power Modes
Mode
Description
No effect on SPI.
WAIT
SPI interrupt events cause the device to exit from WAIT mode.
SPI registers are frozen.
HALT
In HALT mode, the SPI is inactive. SPI operation resumes when the MCU is woken up by an interrupt with
“exit from HALT mode” capability.
12.3.6 Interrupts
Enable
Control from
Bit
Exit
Exit
from
Halt
Event
Flag
Interrupt Event
Wait
Yes
Yes
SPI End of Transfer Event
Master Mode Fault Event
SPIF
No
No
SPIE
MODF
Note: The SPI interrupt events are connected to
the same interrupt vector (see Interrupts chapter).
They generate an interrupt if the corresponding
Enable Control Bit is set and the interrupt mask in
the CC register is reset (RIM instruction).
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