PIC12F510/16F506
TABLE 10-4: RESET CONDITIONS FOR REGISTERS – PIC16F506
MCLR Reset, WDT Time-out,
Register
Address
Power-on Reset
Wake-up On Pin Change, Wake-up on
Comparator Change
W
—
qqqq qqqu(1)
xxxx xxxx
xxxx xxxx
1111 1111
qqqq qqqu(1)
uuuu uuuu
uuuu uuuu
1111 1111
INDF
00h
01h
02h
TMR0
PCL
STATUS
FSR
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
—
0001 1xxx
110x xxxx
1111 111-
--xx xxxx
--xx xxxx
1111 1111
1111 1100
xxxx xxxx
1111 1111
001- 1111
1111 1111
--11 1111
--11 1111
qq0q quuu(2)
11uu uuuu
uuuu uuu-
--uu uuuu
--uu uuuu
uuuu uuuu
uu11 1100
uuuu uuuu
OSCCAL
PORTB
PORTC
CM1CON0
ADCON0
ADRES
CM2CON0
VRCON
OPTION
TRISB
1111 1111
--11 1111
--11 1111
—
TRISC
—
Legend: u= unchanged, x= unknown, – = unimplemented bit, read as ‘0’, q= value depends on condition.
Note 1: Bits <7:2> of W register contain oscillator calibration values due to MOVLW XXinstruction at top of
memory.
2: See Table 10-5 for Reset value for specific conditions.
TABLE 10-5: RESET CONDITION FOR SPECIAL REGISTERS
STATUS Addr: 03h
PCL Addr: 02h
Power-on Reset
0001 1xxx
000u uuuu
0001 0uuu
0000 0uuu
0000 uuuu
1001 0uuu
0101 0uuu
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
MCLR Reset during normal operation
MCLR Reset during Sleep
WDT Reset during Sleep
WDT Reset normal operation
Wake-up from Sleep Reset on pin change
Wake from Sleep Reset on Comparator
Change
Legend: u= unchanged, x= unknown, – = unimplemented bit, read as ‘0’.
DS41268B-page 62
Preliminary
© 2006 Microchip Technology Inc.
ETC [ ETC ]
