TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Data Sheet
June 2002
12 28-Channel Framer Registers (continued)
12.8 Facility Data Link Global Registers
Table 380. FRM_FDLGR1, Receive Facility Data Link Global Register 1 (R/W)
Address
Bit
Name
Function
Reset
Default
Reserved. Must write to 0.
0x80090
15:0
RSVD
0x0000
Table 381. FRM_FDLGR2, Transmit Facility Data Link Global Register 2 (R/W)
Address
Bit
Name
Function
Reset
Default
Reserved. Must write to 0.
0x801A1
15:0
RSVD
0x0000
12.9 Supermapper Framer Per Link Configuration and Status Registers
12.9.1 Signaling Per Link Registers
Table 382. Receive Path Signaling Register Addressing Map
Address Pins (ADDR15—ADDR0)
15 14
13
LNK4 LNK3 LNK2 LNK1 LNK0 RXP = 0
L* R*
12
11
10
9
8
7
0
6
5
4
3
2
1
0
0
0
SIG6 SIG5 SIG4 SIG3 SIG2 SIG1 SIG0
—
* L and R represent hexidecimal digits used for absolute addressing in Table 384, Table 385, and Table 386.
Table 383. Receive Path Signaling Registers Address Indexing
Read: for link 1, the hexidecimal digit L is 0x0 and the hexidecimal digit R is 0x2.
Link
1
L
R
Link
8
L
R
Link
16
17
18
19
20
21
22
23
L
R
Link
24
25
26
27
28
—
L
R
0x0
0x0
0x0
0x0
0x0
0x0
0x0
—
0x2
0x4
0x6
0x8
0xA
0xC
0xE
—
0x1
0x1
0x1
0x1
0x1
0x1
0x1
0x1
0x0
0x2
0x4
0x6
0x8
0xA
0xC
0xE
0x2
0x2
0x2
0x2
0x2
0x2
0x2
0x2
0x0
0x2
0x4
0x6
0x8
0xA
0xC
0xE
0x3
0x3
0x3
0x3
0x3
—
0x0
0x2
0x4
0x6
0x8
—
2
9
3
10
11
12
13
14
15
4
5
6
7
—
—
—
—
—
—
—
272
Agere Systems Inc.
ETC [ ETC ]
