TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Data Sheet
June 2002
12 28-Channel Framer Registers (continued)
Table 373. FRM_SGR3, Receive Signaling Global Register 3 (R/W)
Address
Bit
Name
Function
Reset
Default
0x80062
15:0 FRM_R_SCOSTTH[15:0] Receive Signaling Change of State FIFO Timer
0x0000
Threshold. This number can be programmed from 0 to
0xFFFF. The value indicates the number of 125 µs
increments that the timer counts before interrupting the
processor. The associated interrupt status bit will be set
only if there are valid entries in the FIFO. When set to 0,
the timer is disabled and no interrupt will be generated.
The maximum timer setting is 8 s.
Table 374. FRM_SGR4, Receive Signaling Global Register 4 (RO)
Address Bit Name
Function
Reset
Default
0x80063 15:14
FRM_R_COSFIFOS[1:0] Receive Signaling Change of State FIFO Status.
These bits are located at the address for the signaling
change of state FIFO. These status bits have the fol-
lowing definitions:
0
01 = the entry being read is the last valid entry.
11 = the entry being read is not the last valid entry.
00 = the entry being read is not valid and should be
ignored.
13:9
8:4
FRM_R_COSFIFOL[4:0] COS Link Number. These bits are located at the
address for the signaling change of state FIFO. This
number indicates the particular link from which a sig-
naling change of state has been detected.
0
0
0
FRM_R_COSFIFOTS[4:0] COS Time-Slot Number. These bits are located at
the address for the signaling change of state FIFO.
This number indicates the particular time slot in which
a signaling change of state has been detected.
3:0
FRM_R_COSFIFOSIG[3:0] New Signaling Code. These bits are located at the
address for the signaling change of state FIFO. This
value indicates the new signaling state received.
Table 375. FRM_SGR5, Receive Signaling Global Register 5 (RO)
Address
Bit
Name
Function
Reset
Default
0x80064
15:1
0
RSVD
Reserved.
0X0000
0
FRM_R_COSDTHS Receive Signaling Change of State FIFO Depth Thresh-
old Overflow Status. This status bit reflects the actual
depth of the FIFO entries as compared to the threshold pro-
grammed by the host. When set to 1, the threshold is cur-
rently exceeded. When set to 0, the number of FIFO entries
is less than the programmed threshold.
268
Agere Systems Inc.
ETC [ ETC ]
