a-Si TFT LCD Single Chip Driver
240RGBx320 Resolution and 262K color
ILI9325
8.2. Instruction Descriptions
No. Registers Name
R/W RS
D15
D14
D13
D12
D11
D10
D9
D8
-
D7
D6
D5
ID5
1
D4
ID4
D3
ID3
0
D2
ID2
1
D1
ID1
0
D0
ID0
1
IR Index Register
W
R
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
-
-
0
-
-
1
-
-
-
1
ID7
ID6
00h Driver Code Read
01h Driver Output Control 1
02h LCD Driving Control
03h Entry Mode
1
0
0
0
0
0
0
0
1
0
0
0
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
0
0
0
0
SM
0
SS
0
0
0
0
0
0
0
0
0
0
0
0
0
BC0
HWM
RCV1
0
EOR
0
0
0
0
0
0
0
0
0
TRI
0
DFM
0
BGR
0
0
0
ORG
0
I/D1
RCH1
GON
0
I/D0
RCH0
DTE
0
AM
0
0
0
0
04h Resize Control
0
0
RCV0
BASEE
FP0
PTS0
0
0
0
0
RSZ1
D1
RSZ0
D0
07h Display Control 1
0
0
PTDE1 PTDE0
0
0
0
0
CL
BP3
ISC3
0
08h Display Control 2
0
0
0
0
0
0
FP3
FP2
FP1
PTS1
0
0
0
0
BP2
ISC2
BP1
ISC1
FMI1
RIM1
FMP1
DPL
SLP
VC1
VRH1
0
BP0
ISC0
FMI0
RIM0
FMP0
EPL
STB
VC0
VRH0
0
09h Display Control 3
0
0
0
0
PTS2
0
0
PTG1
0
PTG0
0
0Ah Display Control 4
0
0
0
0
0
0
FMARKOE FMI2
0Ch RGB Display Interface Control 1
0Dh Frame Maker Position
0Fh RGB Display Interface Control 2
10h Power Control 1
0
ENC2 ENC1
ENC0
0
0
0
RM
FMP8
0
0
0
DM1
FMP5
0
DM0
FMP4
VSPL
AP0
DC00
PON
0
0
FMP3
HSPL
0
0
FMP2
0
0
0
0
0
0
0
0
0
0
0
FMP7
0
FMP6
0
0
0
0
0
0
0
0
SAP
0
BT2
DC12
0
BT1
DC11
0
BT0
DC10
0
APE
0
AP2
DC02
0
AP1
DC01
0
DSTB
VC2
VRH2
0
11h Power Control 2
0
0
0
0
0
0
0
0
0
0
12h Power Control 3
0
0
VDV4
0
0
VDV3
0
VCIRE
0
VRH3
0
13h Power Control 4
0
VDV2
0
VDV1
0
VDV0
0
0
0
20h Horizontal GRAM Address Set
21h Vertical GRAM Address Set
0
0
0
AD7
AD15
AD6
AD14
AD5
AD13
AD4
AD12
AD3
AD11
AD2
AD10
AD1
AD9
AD0
AD8
0
0
0
0
0
0
0
AD16
RAM write data (WD17-0) / read data (RD17-0) bits are transferred via different data bus lines according to the selected interfaces.
22h Write Data to GRAM
W
1
29h Power Control 7
W
W
W
W
W
W
W
W
W
W
W
W
W
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCM5
VCM4
VCM3
VCM2 VCM1
VCM0
2Bh Frame Rate and Color Control
30h Gamma Control 1
31h Gamma Control 2
32h Gamma Control 3
35h Gamma Control 4
36h Gamma Control 5
37h Gamma Control 6
38h Gamma Control 7
39h Gamma Control 8
3Ch Gamma Control 9
3Dh Gamma Control 10
50h Horizontal Address Start
0
0
0
0
FRS[3]
FRS[2] FRS[1] FRS[0]
KP1[2] KP1[1] KP1[0]
KP3[2] KP3[1] KP3[0]
KP5[2] KP5[1] KP5[0]
RP1[2] RP1[1] RP1[0]
0
0
0
0
0
0
0
0
KP0[2] KP0[1]
KP2[2] KP2[1]
KP4[2] KP4[1]
RP0[2] RP0[1]
KP0[0]
KP2[0]
KP4[0]
RP0[0]
0
0
0
0
0
0
0
0
0
0
0
0
VRP1[4] VRP1[3] VRP1[2] VRP1[1] VRP1[0]
0
0
0
0
VRP0[3] VRP0[2] VRP0[1] VRP0[0]
0
0
0
0
0
0
0
0
KN1[2] KN1[1] KN1[0]
KN3[2] KN3[1] KN3[0]
KN5[2] KN5[1] KN5[0]
RN1[2] RN1[1] RN1[0]
0
0
0
0
0
0
0
0
KN0[2] KN0[1]
KN2[2] KN2[1]
KN4[2] KN4[1]
KN0[0]
KN2[0]
KN4[0]
0
0
0
0
0
0
0
0
0
0
0
0
RN0[2] RN0[1] RN0[0]
VRN1[4] VRN1[3] VRN1[2] VRN1[1] VRN1[0]
0
0
0
0
VRN0[3] VRN0[2] VRN0[1] VRN0[0]
HSA3 HSA2 HSA1 HSA0
0
0
0
0
0
HSA7
HSA6
HSA5
HSA4
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written
permission of ILI Technology Corp.
Page 51 of 111
Version: 0.35
ETC [ ETC ]
