a-Si TFT LCD Single Chip Driver
240RGBx320 Resolution and 262K color
ILI9325
(a) Basic data transmission through SPI
End
Start
nCS
(Input)
1
0
2
1
3
1
4
1
5
0
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23
24
SCL
(Input)
SDI
(Input)
ID RS RW D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Index register, registers setting, and GRAM write
Start Byte
SDO
(Output)
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Status, registers read and GRAM read
(b) Consecutive data transmission through SPI
Start
nCS
(Input)
9
16
24
25
32
1
8
17
SCL
(Input)
SDI
(Input)
Register 1
upper eight bits
Register 1
lower eight bits
Register 2
upper eight bits
Register 2
lower eight bits
Start Byte
Note: The first byte after the start byte is always the upper eight bits .
Register 1
execution time
(c) GRAM data read transmission
End
Start
nCS
(Input)
SCL
(Input)
SDI
Start Byte
(Input)
RS=1, RW=1
SDO
(Output)
Dummy
read 1
Dummy
read 2
Dummy
read 3
Dummy
read 4
Dummy
read 5
RAM read
upper byte
RAM read
lower byte
Note: Five bytes of invalid dummy data read after the start byte.
(d) Status/registers read transmission
End
Start
nCS
(Input)
9
16
24
1
8
17
SCL
(Input)
SDI
(Input)
Start Byte
SDO
(Output)
Register 1
upper eight bits
Register 1
lower eight bits
Note: One byte of invalid dummy data read after the start byte .
Figure8 Data transmission through serial peripheral interface (SPI)
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.
Page 32 of 111
Version: 0.35