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HD6433846XXXH 参数 Datasheet PDF下载

HD6433846XXXH图片预览
型号: HD6433846XXXH
PDF下载: 下载PDF文件 查看货源
内容描述: 微控制器\n [Microcontroller ]
分类和应用: 微控制器外围集成电路时钟
文件页数/大小: 524 页 / 1465 K
品牌: ETC [ ETC ]
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Bit 1: Tail mark transmission flag (MTRF)  
When MRKON = 1, bit 1 indicates that a tail mark is being transmitted. MTRF is a read-only bit,  
and cannot be modified.  
Bit 1  
MTRF  
Description  
0
1
Idle state, or 8-bit/16-bit data transfer in progress  
Tail mark transmission in progress  
(initial value)  
Bit 0: Start flag (STF)  
The STF bit controls the start of transfer operations. SCI1 transfer operation is started when this  
bit is set to 1.  
STF remains set to 1 during transfer and while SCI1 is waiting for a start bit, and is cleared to 0  
when transfer ends. It can therefore be used as a busy flag.  
Bit 0  
STF  
Description  
0
Read  
Write  
Read  
Write  
Transfer operation stopped  
(initial value)  
Invalid  
1
Transfer operation in progress  
Starts transfer operation  
3. Serial data register U (SDRU)  
Bit  
7
6
5
4
3
2
1
0
SDRU7 SDRU6 SDRU5 SDRU4 SDRU3 SDRU2 SDRU1 SDRU0  
Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined  
Initial value  
Read/Write  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
SDRU is an 8-bit read/write register used as the data register for the upper 8 bits in 16-bit transfer  
(while SDRL is used for the lower 8 bits).  
The data written into SDRU is output to SDRL in LSB-first order. In the replacement process, data  
is input LSB-first from the SI1 pin, and the data is shifted in the MSB LSB direction.  
SDRU read/write operations must only be performed after data transmission/reception has been  
completed. Data contents are not guaranteed if read/write operations are executed while data  
transmission/reception is in progress.  
The value of SDRU is undefined upon reset.  
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