R
XC5200 Series Field Programmable Gate Arrays
XC5200 Program Readback Switching Characteristic Guidelines
Testing of the switching parameters is modeled after testing methods specified by MIL-M-38510/605. All devices are 100%
functionally tested. Internal timing parameters are not measured directly. They are derived from benchmark timing patterns
that are taken at device introduction, prior to any process improvements.
The following guidelines reflect worst-case values over the recommended operating conditions.
Finished
Internal Net
3
T
RTL
rdbk.TRIG
rdclk.I
T
RCRT
T
2
RTRC
1
5
6
T
T
RCH
4
RCL
rdbk.RIP
T
RCRR
DUMMY
DUMMY
VALID
VALID
rdbk.DATA
T
RCRD
7
X1790
Description
Symbol
Min
Max
Units
rdbk.TRIG
rdclk.1
rdbk.TRIG setup to initiate and abort Readback
rdbk.TRIG hold to initiate and abort Readback
1
2
T
T
200
50
-
-
ns
ns
RTRC
RCRT
rdbk.DATA delay
rdbk.RIP delay
High time
7
6
5
4
T
T
-
-
250
250
500
500
ns
ns
ns
ns
RCRD
RCRR
T
T
RCL
250
250
RCH
Low time
Note 1: Timing parameters apply to all speed grades.
Note 2: rdbk.TRIG is High prior to Finished, Finished will trigger the first Readback
7-126
November 5, 1998 (Version 5.2)
ETC [ ETC ]
