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NT5DS16M8AT-7K 参数 Datasheet PDF下载

NT5DS16M8AT-7K图片预览
型号: NT5DS16M8AT-7K
PDF下载: 下载PDF文件 查看货源
内容描述: DDR同步DRAM [DDR Synchronous DRAM ]
分类和应用: 内存集成电路光电二极管动态存储器双倍数据速率时钟
文件页数/大小: 76 页 / 1242 K
品牌: ETC [ ETC ]
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NT5DS32M4AT  
NT5DS16M8AT  
128Mb Double Data Rate SDRAM  
AC Characteristics  
(Notes 1-5 apply to the following Tables; Electrical Characteristics and DC Operating Conditions, AC Operating Conditions, IDD  
Specifications and Conditions, and Electrical Characteristics and AC Timing.)  
1. All voltages referenced to VSS  
.
2. Tests for AC timing, IDD, and electrical, AC and DC characteristics, may be conducted at nominal reference/supply voltage  
levels, but the related specifications and device operation are guaranteed for the full voltage range specified.  
3. Outputs measured with equivalent load. Refer to the AC Output Load Circuit below.  
4. AC timing and IDD tests may use a VIL to VIH swing of up to 1.5V in the test environment, but input timing is still referenced  
to VREF (or to the crossing point for CK, CK), and parameter specifications are guaranteed for the specified AC input levels  
under normal use conditions. The minimum slew rate for the input signals is 1V/ns in the range between V  
and  
IL(AC)  
VIH(AC)  
.
5. The AC and DC input level specifications are as defined in the SSTL_2 Standard (i.e. the receiver effectively switches as a  
result of the signal crossing the AC input level, and remains in that state as long as the signal does not ring back above  
(below) the DC input low (high) level.  
AC Output Load Circuit Diagrams  
V
V
DDQ  
TT  
50W  
150W  
Output  
(V  
QFC  
(V  
Timing Reference Point  
Timing Reference Point  
)
)
OUT  
OUT  
30pF  
15pF  
56  
REV 1.0  
May, 2001  
©
NANYA TECHNOLOGY CORP. All rights reserved.  
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.  
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