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Z8S18010FSC 参数 Datasheet PDF下载

Z8S18010FSC图片预览
型号: Z8S18010FSC
PDF下载: 下载PDF文件 查看货源
内容描述: 增强Z180微处理器 [ENHANCED Z180 MICROPROCESSOR]
分类和应用: 外围集成电路微处理器时钟
文件页数/大小: 70 页 / 386 K
品牌: ZILOG [ ZILOG, INC. ]
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Z80180/Z8S180/Z8L180  
Enhanced Z180 Microprocessor  
Zilog  
CLOCK MULTIPLIER REGISTER (Z180 MPU ADDRESS 1EH)  
Bit 6. Low Noise Crystal Option. Setting this bit to 1 will  
enable the low noise option for the EXTAL and XTAL pins.  
This option reduces the gain, in addition to reduction the  
output drive capability to 30% of its original drive capability.  
The Low Noise Crystal Option is recommended in the use  
of crystals for PCMCIA applications where the crystal may  
be driven too hard by the oscillator. Setting this bit to 0 will  
select for normal operation of the EXTAL and XTAL pins.  
The default for this bit is 0.  
7
0
6
0
5
1
4
1
3
1
2
1
1
1
0
1
1
RESERVED  
LOW NOISE CRYSTAL  
X2 CLOCK MULTIPLIER  
Note: Operating restrictions for device operation are listed  
below. If low noise option is required, and normal device  
operation is needed, use the clock multiplier feature.  
Figure 54. Clock Multiplier Register  
Table 9. Low Noise Option  
Bit 7. X2 Clock Multiplier Mode. When this bit is set to 1,  
this allows the programmer to double the internal clock  
from that of the external clock. This feature will only oper-  
ated effectively with frequencies of 10-16 MHz (20-32MHz  
Low Noise  
ADDR 1E, bit 6=1  
Normal  
ADDR 1E, bit 6=0  
20 MHz @ 4.5V, 100°C  
10 MHz @ 3.0V, 100°C  
33 MHz @ 4.5V, 100°C  
20 MHz @ 3.0V, 100°C  
internal).  
When this bit is set to 0, the  
Z80180/Z8S180/Z8L180 device will operate in normal  
mode. Upon powerup, this feature is disabled.  
DS971800401  
P R E L I M I N A R Y  
1-49  
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