Z80180/Z8S180/Z8L180
Enhanced Z180 Microprocessor
Zilog
Timer Data Register Channel 1L
Timer Reload Register Channel 1L
Mnemonic TMDR1L
Mnemonic RLDR1H
1
Address 14
Address 17
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Timer Data
Reload Data
Figure 51. Timer Relaod Register Channel 1L
Figure 48. Timer Data Register 1L
Free Running Counter (Read Only)
Timer Data Register Channel 1H
Mnemonic FRC
Mnemonic TMDR1H
Address 18
Address 15
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Counting Data
Figure 52. Free Running Counter
Timer Data
Figure 49. Timer Data Register 1H
Timer Reload Register Channel 1L
Mnemonic RLDR1L
Address 16
7
6
5
4
3
2
1
0
Reload Data
Figure 50. Timer Reload Channel 1L
DS971800401
P R E L I M I N A R Y
1-47