Z80180/Z8S180/Z8L180
Enhanced Z180 Microprocessor
Zilog
DMA MEMORY ADDRESS REGISTER CHANNEL 1
(MAR1: I/O Address = 28H to 2AH) specifies the physical memory address for channel 1 transfers. This may be destina-
tion or source memory address. The register contains 20 bits and may specify up to 1024 KB memory address.
1
DMA Memory Address Register, Channel 1L
DMA Memory Address Register, Channel 1B
Mnemonic MAR1L
Mnemonic MAR1B
Address 28
Address 2A
Figure 65. DMA Memory Address Register,
Channel 1L
Figure 67. DMA Memory Address Register,
Channel 1B
DMA Memory Address Register, Channel 1H.
Mnemonic MAR1H
Address 29
Figure 66. DMA Memory Address Register,
Channel 1H
DS971800401
P R E L I M I N A R Y
1-53
ZILOG [ ZILOG, INC. ]
