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ZiLOG
All64#2U occur after fetchinganundefined secondopcode
byte following one of the prefix opcodes (CBH, DDH, EDH,
or FDH) or after fetching an undefined third opcode byte
following one of the double-prefix opcodes (DDCBH or
FDCBH).
The state of the Undefined Fetch Object (7(1) bit in +6%
allows 64#2 softwaretocorrectlyadjust thestackedPC, de-
pending on whether the second or third byte of the opcode
generated the 64#2. If 7(1ꢅꢐꢅ0, the starting address of
the invalid instruction is the stacked 2% ꢄ. If 7(1ꢅꢐ 1, the
starting address of the invalid instruction is equal to the
stacked 2% ꢂ.
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ZILOG [ ZILOG, INC. ]
