Z8FMC16100 Series Flash MCU
Product Specification
43
Table 19. Port A–B Alternate Function 0 Sub-Registers
BITS
FIELD
RESET
R/W
7
6
5
4
3
2
1
0
AF0_7
AF0_6
AF0_5
AF0_4
AF0_3
AF0_2
AF0_1
AF0_0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
If 02H in Port A-C Address Register, accessible through the Port A-C Control Register
ADDR
Bit
Value
(H)
Description
Position
[7:0]
AF0
Port Alternate Function 0 select.
0
1
The alternate function 0 function is not selected.
The alternate function 0 function is selected.
Port A–C Output Control Subregisters
The Port A–C Output Control subregisters, shown in Table 20, are accessed through the
Port A–C Control registers by writing 03hto the Port A–C Address registers. Setting the
bits in the Port A–C Output Control subregisters to 1 configures the specified port pins for
open-drain operation. These subregisters affect the pins directly and, as a result, alternate
functions are also affected.
Table 20. Port A–C Output Control Sub-Registers
BITS
FIELD
RESET
R/W
7
6
5
4
3
2
1
0
POC7
POC6
POC5
POC4
POC3
POC2
POC1
POC0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
If 03H in Port A–C Address Register, accessible through the Port A–C Control Register
ADDR
Bit
Value
(H)
Description
Position
[7:0]
Port Output Control
POC
0
1
These bits function independently of the alternate function bit and disable the
drains if set to 1.
The drains are enabled for any output mode.
The drain of the associated pin is disabled (open-drain mode).
PS024604-1005
P R E L I M I N A R Y
Port A–C Control Registers
ZILOG [ ZILOG, INC. ]
