Z8FMC16100 Series Flash MCU
Product Specification
45
Table 22. Port A–C STOP Mode Recovery Source Enable Sub-Registers
BITS
FIELD
RESET
R/W
7
6
5
4
3
2
1
0
PSMRE7 PSMRE6 PSMRE5 PSMRE4 PSMRE3 PSMRE2 PSMRE1 PSMRE0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
If 05H in Port A–C Address Register, accessible through the Port A–C Control Register
ADDR
Bit
Value
(H)
Description
Position
[7:0]
Port STOP Mode Recovery Source Enable
PSMRE
0
1
The Port pin is not configured as a STOP Mode Recovery source. Transitions on
this pin during STOP mode do not initiate STOP Mode Recovery.
The Port pin is configured as a STOP Mode Recovery source. Any logic
transition on this pin during STOP mode initiates STOP Mode Recovery.
Port A–C Pull-Up Enable Subregisters
The Port A–C Pull-Up Enable subregisters, shown in Table 23, are accessed through the
Port A–C Control registers by writing 06hto the Port A–C Address registers. Setting the
bits in the Port A–C Pull-Up Enable subregisters enables a weak internal resistive pull-up
on the specified port pins.
PS024604-1005
P R E L I M I N A R Y
Port A–C Control Registers