Z8 Encore!® Motor Control Flash MCUs
Product Specification
46
Table 23. Port A–C Pull-Up Enable Sub-Registers
BITS
FIELD
RESET
R/W
7
6
5
4
3
2
1
0
PPUE7
PPUE6
PPUE5
PPUE4
PPUE3
PPUE2
PPUE1
PPUE0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
If 06H in Port A–C Address Register, accessible through the Port A–C Control Register
ADDR
Bit
Value
(H)
Description
Position
[7:0]
Port Pull-Up Enable
PPUE
0
1
The weak pull-up on the Port pin is disabled.
The weak pull-up on the Port pin is enabled.
Port A Interrupt Edge Select Subregister
The Interrupt Edge Select (IRQES) Subregister, shown in Table 24, determines whether an
interrupt is generated for the rising edge or falling edge on the selected GPIO Port A input
pin.
Table 24. Interrupt Edge Select Sub-Register (IRQES)
BITS
FIELD
RESET
R/W
7
6
5
4
3
IES3
2
IES2
1
IES1
0
IES0
Reserved
0
0
0
0
0
0
0
0
R
R
R
R
R/W
R/W
R/W
R/W
If 08H in Port A Address Register, accessible through the Port A and Port C Control Register
ADDR
Bit
Value
(H)
Description
Position
[3:0]
IESx
Interrupt Edge Select x
0
1
An interrupt request is generated on the falling edge of the PAx input.
An interrupt request is generated on the rising edge of the PAx input,
where x indicates the specific GPIO Port pin number (0 through 7).
General-Purpose I/O
P R E L I M I N A R Y
PS024604-1005
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