Z8FMC16100 Series Flash MCU
Product Specification
81
Bit
Value
(H)
Description
Position
[1:0]
PWM Prescaler
PRES
The prescaler divides down the PWM input clock (either the system clock or the
PWMIN external input). This field is buffered. Changes to this field take effect at
the next PWM reload event. Reads always return the values from the
temporary holding register.
Divide by 1
00
01
10
11
Divide by 2
Divide by 4
Divide by 8
PWM Deadband Register
The PWM Deadband (PWMDB) Register, shown in Table 50, stores the 8-bit PWM dead-
band value. This register determines the number of system clock cycles inserted as dead-
time in complementary output mode. The minimum deadband value is 1.
Table 50. PWM Dead-Band Register (PWMDB)
BITS
FIELD
RESET
R/W
7
6
5
4
3
2
1
0
PWMDB[7:0]
01H
R/W
F22H
ADDR
Bit
Value
(H)
Description
Position
[7:0]
PWM Dead band
PWMDB
Sets the PWM dead band period for which both PWM outputs of a
complementary PWM output pair are deasserted.
Note: This register can only be written when PWENis cleared.
PS024604-1005
P R E L I M I N A R Y
PWM Deadband Register
ZILOG [ ZILOG, INC. ]
