Z8FMC16100 Series Flash MCU
Product Specification
85
PWM Fault Control Register
The PWM Fault Control (PWMFCTL) Register, shown in Table 54, determines how the
PWM recovers from a fault condition. Settings in this register select automatic or software
controlled PWM restart.
Table 54. PWM Fault Control Register (PWMFCTL)
BITS
FIELD
RESET
R/W
7
6
5
4
3
2
1
0
Reserved
Fault0RST
DBGRST Fault1INT Fault1RST CMPINT CMPRST Fault0INT
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
F28H
ADDR
Bit
Value
(H)
Description
Position
[7]
Reserved.
Reserved
0
0
1
[6]
DebugRestart
DBGRST
Automatic recovery. PWM resumes control of outputs when all fault sources have
deasstered and a new PWM period begins.
Software controlled recovery. PWM resumes control of outputs only after all fault
sources have deasserted and all fault flags are cleared and a PWM reload occurs
[5]
Fault 1 Interrupt
Fault1INT
0
1
Interrupt on comparator assertion disabled.
Interrupt on comparator assertion enabled.
[4]
Fault 1 Restart
Fault1RST
0
1
Automatic recovery. PWM resumes control of outputs when all fault sources have
deasstered.
Software controlled recovery. PWM resumes control of outputs only after all fault
sources have deasserted and all fault flags are cleared and a PWM reload occurs
[3
Comparator 0 Interrupt
CMP0INT
0
1
Interrupt on comparator 0 assertion disabled.
Interrupt on comparator 0 assertion enabled.
[2]
Comparator 0 Restart
CMP0RST
0
1
Automatic recovery. PWM resumes control of outputs when all fault sources have
deasstered.
Software controlled recovery. PWM resumes control of outputs only after all fault
sources have deasserted and all fault flags are cleared and a PWM reload occurs
PS024604-1005
P R E L I M I N A R Y
PWM Fault Control Register
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