Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
Z8 Encore!®
116
1. Software writes the I2C Data register with a 7-bit slave address followed by a 1 (read).
2. Software asserts the START bit of the I2C Control register.
3. Software asserts the NAKbit of the I2C Control register so that after the first byte of
data has been read by the I2C Controller, a Not Acknowledge is sent to the I2C slave.
4. The I2C Controller sends the START condition.
5. The I2C Controller sends the address and read bit by the SDA signal.
6. The I2C slave sends an Acknowledge by pulling the SDA signal Low during the next
high period of SCL.
7. The I2C Controller reads the first byte of data from the I2C slave.
8. The I2C Controller asserts the Receive interrupt.
9. Software responds by reading the I2C Data register.
10. The I2C Controller sends a NAK to the I2C slave.
11. A NAK interrupt is generated by the I2C Controller.
12. Software responds by setting the STOPbit of the I2C Control register.
13. A STOP condition is sent to the I2C slave.
Reading a Transaction with a 10-Bit Address
Figure 82 illustrates the receive format for a 10-bit addressed slave. The shaded regions
indicate data transferred from the I2C Controller to slaves and unshaded regions indicate
data transferred from the slaves to the I2C Controller.
S Slave Address W=0 A Slave address A S Slave Address R=1 A Data A Data A P
1st 7 bits
2nd Byte
1st 7 bits
Figure 82. Receive Data Format for a 10-Bit Addressed Slave
The first seven bits transmitted in the first byte are 11110XX. The two bits XXare the two
most-significant bits of the 10-bit address. The lowest bit of the first byte transferred is the
write signal.
The data transfer format for a receive operation on a 10-bit addressed slave is as follows:
1. Software writes an address 11110B followed by the two address bits and a 0 (write).
2. Software asserts the STARTbit of the I2C Control register.
3. The I2C Controller sends the Start condition.
PS017609-0803
I2C Controller
ZILOG [ ZILOG, INC. ]
