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Z8F2401VN020SC 参数 Datasheet PDF下载

Z8F2401VN020SC图片预览
型号: Z8F2401VN020SC
PDF下载: 下载PDF文件 查看货源
内容描述: Z8喝采微控制器与闪存和10位A / D转换器 [Z8 Encore Microcontrollers with Flash Memory and 10-Bit A/D Converter]
分类和应用: 转换器闪存微控制器
文件页数/大小: 246 页 / 1767 K
品牌: ZILOG [ ZILOG, INC. ]
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Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x  
Z8 Encore!®  
115  
7. The I2C Controller loads the I2C Shift register with the contents of the I2C Data  
register.  
8. After one bit of address is shifted out by the SDA signal, the Transmit interrupt is  
asserted.  
9. Software responds by writing the second byte of address into the contents of the I2C  
Data register.  
10. The I2C Controller shifts the rest of the first byte of address and write bit out by the  
SDA signal.  
11. The I2C slave sends an acknowledge by pulling the SDA signal low during the next  
high period of SCL. The I2C Controller sets the ACKbit in the I2C Status register.  
12. The I2C Controller loads the contents of the I2C Shift register with the contents of the  
I2C Data register.  
13. The I2C Controller shifts the data out by the SDA signal. After the first bit has been  
sent, the Transmit interrupt is asserted.  
14. Software responds by writing the data to be written out to the I2C Control register.  
15. The I2C Controller shifts out the rest of the second byte of slave address by the SDA  
signal.  
16. The I2C slave sends an acknowledge by pulling the SDA signal low during the next  
high period of SCL. The I2C Controller sets the ACKbit in the I2C Status register.  
17. The I2C Controller shifts the data out by the SDA signal. After the first bit is sent, the  
Transmit interrupt is asserted.  
18. Software responds by asserting the STOPbit of the I2C Control register.  
19. The I2C Controller completes transmission of the data on the SDA signal.  
20. The I2C Controller sends the STOP condition to the I2C bus.  
Reading a Transaction with a 7-Bit Address  
Figure 81 illustrates the data transfer format for a receive operation on a 7-bit addressed  
slave. The shaded regions indicate data transferred from the I2C Controller to slaves and  
unshaded regions indicate data transferred from the slaves to the I2C Controller.  
S
Slave Address  
R=1  
A
Data  
A
Data  
A
P
Figure 81. Receive Data Transfer Format for a 7-Bit Addressed Slave  
The data transfer format for a receive operation on a 7-bit addressed slave is as follows:  
PS017609-0803  
I2C Controller  
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