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Z8F2401VN020SC 参数 Datasheet PDF下载

Z8F2401VN020SC图片预览
型号: Z8F2401VN020SC
PDF下载: 下载PDF文件 查看货源
内容描述: Z8喝采微控制器与闪存和10位A / D转换器 [Z8 Encore Microcontrollers with Flash Memory and 10-Bit A/D Converter]
分类和应用: 转换器闪存微控制器
文件页数/大小: 246 页 / 1767 K
品牌: ZILOG [ ZILOG, INC. ]
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Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x  
Z8 Encore!®  
113  
2. The I2C Controller waits for the slave to send an Acknowledge (by pulling the SDA  
signal Low). If the slave pulls the SDA signal High (Not-Acknowledge), the I2C  
Controller sends a Stop signal.  
3. If the slave needs to service an interrupt, it pulls the SCL signal Low, which halts I2C  
operation.  
4. If there is no other data in the I2C Data register or the STOPbit in the I2C Control  
register is set by software, then the Stop signal is sent.  
Figure 79 illustrates the data transfer format for a 7-bit addressed slave. Shaded regions  
indicate data transferred from the I2C Controller to slaves and unshaded regions indicate  
data transferred from the slaves to the I2C Controller.  
A
Slave Address  
W=0  
Data  
S
A
Data  
A
Data  
A/A  
P
Figure 79. 7-Bit Addressed Slave Data Transfer Format  
The data transfer format for a transmit operation on a 7-bit addressed slave is as follows:  
1. Software asserts the IENbit in the I2C Control register.  
2. Software asserts the TXIbit of the I2C Control register to enable Transmit interrupts.  
3. The I2C interrupt asserts, because the I2C Data register is empty  
4. Software responds to the TDREbit by writing a 7-bit slave address followed by a 0  
(write) to the I2C Data register.  
5. Software asserts the START bit of the I2C Control register.  
6. The I2C Controller sends the START condition to the I2C slave.  
7. The I2C Controller loads the I2C Shift register with the contents of the I2C Data  
register.  
8. After one bit of address has been shifted out by the SDA signal, the Transmit interrupt  
is asserted.  
9. Software responds by writing the contents of the data into the I2C Data register.  
10. The I2C Controller shifts the rest of the address and write bit out by the SDA signal.  
11. The I2C slave sends an acknowledge (by pulling the SDA signal low) during the next  
high period of SCL. The I2C Controller sets the ACKbit in the I2C Status register.  
12. The I2C Controller loads the contents of the I2C Shift register with the contents of the  
I2C Data register.  
13. The I2C Controller shifts the data out of via the SDA signal. After the first bit is sent,  
the Transmit interrupt is asserted.  
PS017609-0803  
I2C Controller