eZ80L92 MCU
Product Specification
161
quency. Table 89 lists the recommended frequencies of the ZDI clock in relation to the
system clock.
Table 89. Recommended ZDI Clock versus System Clock Frequency
System Clock
Frequency
ZDI Clock
Frequency
3–10 MHz
8–16 MHz
12–24 MHz
20–50 MHz
1 MHz
2 MHz
4 MHz
8 MHz
ZDI-Supported Protocol
ZDI supports a bidirectional serial protocol. The protocol defines any device that sends
data as the transmitter and any receiving device as the receiver. The device controlling the
transfer is the master and the device being controlled is the slave. The master always
initiates the data transfers and provides the clock for both receive and transmit operations.
The ZDI block on the ZLP12840 MCU is considered as slave in all data transfers.
Figure 36 illustrates the schematic for building a connector on a target board. This
connector allows you to connect directly to the ZPAK emulator using a six-pin header.
TVDD
(Target VDD
)
10 K‰
10 K‰
2
4
6
1
3
5
eZ80L92
MCU
TCK (ZCL)
TDI (ZDA)
6-Pin Target Connector
Figure 36. Schematic For Building a Target Board ZPAK Connector
PS013015-0316
Zilog Debug Interface