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EZ80L92AZ020SC00TR 参数 Datasheet PDF下载

EZ80L92AZ020SC00TR图片预览
型号: EZ80L92AZ020SC00TR
PDF下载: 下载PDF文件 查看货源
内容描述: [IC MCU 8BIT ROMLESS 100LQFP]
分类和应用:
文件页数/大小: 238 页 / 1067 K
品牌: ZILOG [ ZILOG, INC. ]
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eZ80L92 MCU  
Product Specification  
165  
ZDI Block Write  
The Block Write operation is initiated in the same manner as the single-byte Write opera-  
tion, but instead of terminating the Write operation after the first data byte is transferred,  
the ZDI master can continue to transmit additional bytes of data to the ZDI slave on the  
ZLP12840. After the receipt of each byte of data the ZDI register address increments by 1.  
If the ZDI register address reaches the end of the Write-Only ZDI register address space  
(30h), the address stops incrementing. Figure 41 illustrates the timing for ZDI Block  
Write operations.  
ZDI Data Bytes  
ZCL  
ZDA  
7
8
9
1
2
7
8
9
1
2
A0  
Write  
0/1  
D7  
D6  
D1  
D0  
0/1  
D7  
D6  
msb  
of DATA  
Byte 1  
lsb  
of DATA  
Byte 1  
msb  
of DATA  
Byte 2  
lsb of  
Single-Bit  
Single-Bit  
Byte Separator  
ZDI Address Byte Separator  
Figure 41. ZDI Block Data Write Timing  
ZDI Read Operations  
ZDI Single-Byte Read  
Single-byte Read operations are initiated in the same manner as single-byte Write opera-  
tions, with the exception that the R/W bit of the ZDI register address is set to 1. Upon  
receipt of a slave address with the R/W bit set to 1, the ZLP12840’s ZDI block loads the  
selected data into the shifter at the beginning of the first cycle following the single-bit data  
separator. The most significant bit (msb) is shifted out first. Figure 42 illustrates the timing  
for ZDI single-byte Read operations.  
PS013015-0316  
Zilog Debug Interface  
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