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ZL50022QCG1 参数 Datasheet PDF下载

ZL50022QCG1图片预览
型号: ZL50022QCG1
PDF下载: 下载PDF文件 查看货源
内容描述: 增强型4K的数字开关与地层4E DPLL [Enhanced 4 K Digital Switch with Stratum 4E DPLL]
分类和应用: 开关电信集成电路电信转换电路电信电路
文件页数/大小: 121 页 / 931 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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ZL50022  
Data Sheet  
When CMM is one, the device is programmed to perform one of the special per-channel transmission modes. Bits  
PCC0 and PCC1 from connection memory are used to select the per-channel tristate, message or BER test mode  
as shown in Table 54 on page 88.  
15  
14  
0
13  
0
12  
0
11  
0
10  
9
8
7
6
5
4
3
2
1
0
UA  
EN  
MSG  
7
MSG  
6
MSG  
5
MSG  
4
MSG  
3
MSG  
2
MSG  
1
MSG  
0
PCC  
1
PCC  
0
CMM  
=1  
Bit  
Name  
Description  
15  
UAEN  
Conversion between µ-law and A-law Enable (Message mode only)  
When this bit is low, message mode has no µ-law/A-law conversion. Connec-  
tion memory high will be ignored.  
When this bit is high, message mode has µ-law/A-law conversion, and con-  
nection memory high controls the conversion method.  
14 - 11  
10 - 3  
Unused  
Reserved  
In normal functional mode, these bits MUST be set to zero.  
MSG7 - 0 Message Data Bits  
8-bit data for the message mode. Not used in the per-channel tristate and  
BER test modes.  
2 - 1  
PCC1 - 0  
Per-Channel Control Bits  
These two bits control the corresponding entry’s value on the STio stream.  
PC  
C1  
PC  
C0  
Channel Output Mode  
0
0
1
1
0
1
0
1
Per Channel Tristate  
Message Mode  
BER Test Mode  
Reserved  
0
CMM = 1  
Connection Memory Mode = 1  
If this is high, the connection memory is in the per-channel control mode  
which is per-channel tristate, per-channel message mode or per-channel BER  
mode.  
Note: For proper µ-law/A-law conversion, the CM_H bits should be set before Bit 15 (UAEN bit) is set to high.  
Table 54 - Connection Memory Low (CM_L) Bit Assignment when CMM = 1  
88  
Zarlink Semiconductor Inc.  
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