ZL50022
Data Sheet
24.0 Memory
24.1 Memory Address Mappings
When A13 is high, the data or connection memory can be accessed by the microprocessor port. Bit 1 - 0 in the
Control Register determine the access to the data or connection memory (CM_L or CM_H).
MSB
Stream Address
(St0 - 31)
Channel Address
(Ch0 - 255)
(Note 1)
A12
A11
A10
A9
A8
Stream [n]
A7
A6
A5
A4
A3
A2
A1
A0
Channel [n]
A13
1
1
1
1
1
1
1
1
1
.
0
0
0
0
0
0
0
0
0
.
0
0
0
0
0
0
0
0
1
.
0
0
0
0
1
1
1
1
0
.
0
0
1
1
0
0
1
1
0
.
0
1
0
1
0
1
0
1
0
.
Stream 0
0
0
.
0
0
.
0
0
.
0
0
.
0
0
.
0
0
.
0
0
.
0
1
.
Ch 0
Stream 1
Ch 1
Stream 2
.
Stream 3
.
.
.
.
.
.
.
.
.
Stream 4
0
0
0
0
.
0
0
0
0
.
0
0
1
1
.
1
1
0
0
1
1
0
0
.
1
1
0
0
.
1
1
0
0
0
1
0
1
.
Ch 30
Stream 5
Ch 31 (Note 2)
Stream 6
Ch 32
Stream 7
Ch 33
Stream 8
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
0
0
.
0
0
.
1
1
.
1
1
.
1
1
.
1
1
.
1
1
.
0
1
.
Ch 62
.
.
.
.
.
.
.
Ch 63 (Note 3)
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
1
1
.
0
0
.
1
1
.
1
1
.
1
1
.
0
1
.
Stream 14
.
.
.
.
.
.
.
.
.
Stream 15
.
.
.
.
.
.
.
.
.
.
0
0
.
1
1
.
1
1
.
1
1
.
1
1
.
1
1
.
1
1
.
0
1
.
Ch126
.
.
.
.
.
.
.
Ch 127 (Note 4)
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
1
1
1
1
1
1
1
1
1
1
0
1
Stream 30
Stream 31
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
Ch 254
Ch 255 (Note 5)
Note 1: A13 must be high for access to data and connection memory positions. A13 must be low to access internal
registers.
Note 2: Channels 0 to 31 are used when serial stream is at 2.048 Mbps.
Note 3: Channels 0 to 63 are used when serial stream is at 4.096 Mbps.
Note 4: Channels 0 to 127 are used when serial stream is at 8.192 Mbps.
Note 5: Channels 0 to 255 are used when serial stream is at 16.384 Mbps.
Table 52 - Address Map for Memory Locations (A13 = 1)
86
Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
