GP1020
TIMING CHARACTERISTICS (See Figs. 4 to 9)
Characteristic
Symbol
Value
Min.
Address hold time
ALE pulse width
ALE valid to WEN or RW valid (WPROG = 1)
ALE valid to WEN or RW valid (WPROG = 0)
Address valid to ALE low
Address valid to WEN or RW valid
CS high to ALE valid
CS low to WEN or RW valid
Data hold time
Data setup time
RW high to data at high impedance
RW valid to data valid
RW valid to WEN high
WEN low to RW not valid
Write pulse width
CS hold time after RW or WEN not valid
t
AHOLD
t
ALEPW
t
ALESETUP
t
ALVWRV
t
ASETUP
t
AVWRV
t
CHALV
t
CVWRV
t
DHOLD
t
DSETUP
t
RHDZ
t
RVDV
t
RWVWENH
t
WENLRWNV
t
WLWH
t
WRCH
10
20
5
20
20
20
10
0
10
30
10
10
15
15
30
0
Max.
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
Conditions
25
50
NOTE. This timing information is based on simulations and is not verified by measurement on each device.
GP1020 BUS TIMING DIAGRAMS
WEN
t
CVWRV
CS
t
ALESETUP
t
WLWH
ALE
t
ALEPW
t
ASETUP
A (8:1)
t
AHOLD
A (8:1)
t
DSETUP
D (15:0)
RW (HIGH)
t
DHOLD
D (15:0)
WEN (HIGH)
t
CHALV
NEXT
R/W
RW
t
WRHCH
CS
t
ALESETUP
ALE
t
ALEPW
t
ASETUP
t
AHOLD
t
CHALV
NEXT
R/W
t
CVWRV
t
WRHCH
ADDRESS VALID
ADDRESS VALID
t
RVDV
DATA VALID
t
RHDZ
DATA VALID
Fig. 4 Intel 486 mode WRITE. MOT/INTEL = 0, WPROG = 1
(Write inhibited until ALE falling edge)
WEN
t
CVWRV
CS
t
ALVWRV
ALE
t
AVWRV
A (8:1)
t
AHOLD
ADDRESS VALID
Fig. 5 Intel 486 mode READ. MOT/INTEL = 0, WPROG = 1
RW
t
WRHCH
t
WLWH
CS
t
CVWRV
t
WRHCH
t
CHALV
NEXT
R/W
t
ALVWRV
ALE
t
AVWRV
A (8:1)
t
AHOLD
ADDRESS VALID
t
CHALV
NEXT
R/W
t
DSETUP
D (15:0)
RW (HIGH)
t
DHOLD
D (15:0)
WEN (HIGH)
t
RVDV
DATA VALID
t
RHDZ
DATA VALID
Fig. 6 Intel 186 mode WRITE. MOT/INTEL = 0, WPROG = 0
Fig. 7 Intel 186 mode READ. MOT/INTEL = 0, WPROG = 0
5
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