Spartan-3E FPGA Family: Functional Description
X-Ref Target - Figure 50
Horizontal and Vertical
Long Lines
24
(horizontal channel
shown as an example)
CLB
CLB
CLB
CLB
CLB
CLB
CLB
CLB
CLB
CLB
6
6
6
6
6
DS312-2_10_022305
Horizontal and Vertical
Hex Lines
8
(horizontal channel
shown as an example)
CLB
CLB
CLB
CLB
CLB
CLB
CLB
DS312-2_11_020905
Horizontal and Vertical
Double Lines
8
(horizontal channel
shown as an example)
CLB
CLB
CLB
DS312-2_15_022305
Direct Connections
CLB
CLB
CLB
CLB
CLB
CLB
CLB
CLB
CLB
DS312-2_12_020905
Figure 50: Interconnect Types between Two Adjacent Interconnect Tiles
The four types of general-purpose interconnect available in
each channel, shown in Figure 50, are described below.
Hex Lines
Each set of eight hex lines are connected to one out of
every three tiles, both horizontally and vertically. Thirty-two
hex lines are available between any given interconnect tile.
Hex lines are only driven from one end of the route.
Long Lines
Each set of 24 long line signals spans the die both
horizontally and vertically and connects to one out of every
six interconnect tiles. At any tile, four of the long lines drive
or receive signals from a switch matrix. Because of their low
capacitance, these lines are well-suited for carrying
high-frequency signals with minimal loading effects (e.g.
skew). If all global clock lines are already committed and
additional clock signals remain to be assigned, long lines
serve as a good alternative.
Double Lines
Each set of eight double lines are connected to every other
tile, both horizontally and vertically. in all four directions.
Thirty-two double lines available between any given
interconnect tile. Double lines are more connections and
more flexibility, compared to long line and hex lines.
DS312 (v4.2) December 14, 2018
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Product Specification
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XILINX [ XILINX, INC ]
