R
Spartan-IIE FPGA Family: Pinout Tables
PQ208 Pinouts (XC2S50E, XC2S100E,
XC2S150E, XC2S200E, XC2S300E)
PQ208 Pinouts (XC2S50E, XC2S100E,
XC2S150E, XC2S200E, XC2S300E)
Pad Name
LVDS
Async.
Output
Option
Pad Name
LVDS
Async.
Output
Option
VREF
Option
VREF
Option
Function
Bank
Pin
Function
Bank
Pin
P66
P67
P68
I/O, VREF
Bank 6,
L39P
6
P45 XC2S100E,
150E
All
VCCO
-
-
-
-
-
-
-
VCCINT
I/O, L33N
5
XC2S50E,
100E, 200E,
300E
I/O, L39N
6
6
6
6
P46 XC2S100E,
150E
-
I/O
P47
P48
P49
-
XC2S200E,
300E
I/O, L33P
5
P69
P70
XC2S50E,
100E, 200E,
300E
-
I/O,
All
All
-
L38P_YY
I/O
5
5
-
-
-
I/O,
-
I/O, L32N
P71 XC2S100E,
150E
L38N_YY
M1
-
-
-
-
-
P50
P51
P52
P53
P54
-
-
-
-
-
-
-
-
-
-
GND
-
P72
-
-
GND
M0
I/O, VREF
Bank 5,
L32P
5
P73 XC2S100E,
150E
All
VCCO
M2
I/O
5
5
P74
P75
-
-
-
-
I/O (DLL),
L31N
I/O,
L37N_YY
5
5
5
P55
P56
P57
All
All
-
-
-
VCCINT
GCK1, I
VCCO
GND
-
5
-
P76
P77
P78
P79
-
-
-
-
-
-
-
-
I/O,
L37P_YY
I/O
XC2S200E,
300E
-
I/O
5
5
P58
P59
-
-
GCK0, I
4
4
P80
P81
-
-
-
-
I/O, VREF
Bank 5,
L36N_YY
All
All
I/O (DLL),
L31P
I/O
4
4
P82
P83
-
-
-
I/O,
L36P_YY
5
5
5
5
P60
P61
P62
P63
All
-
-
-
I/O, L30N
XC2S50E,
200E, 300E
I/O, L35N
I/O, L35P
I/O, L34N
XC2S50E,
100E, 300E
I/O, VREF
Bank 4,
L30P
4
P84
XC2S50E,
200E, 300E
All
XC2S50E,
100E, 300E
GND
-
P85
P86
-
-
-
XC2S50E, XC2S100E,
100E, 200E, 150E, 200E,
I/O, L29N
4
XC2S50E,
200E, 300E
300E
300E
I/O, L29P
I/O, L28N
4
4
P87
P88
XC2S50E,
200E, 300E
-
-
I/O, L34P
GND
5
-
P64
P65
XC2S50E,
100E, 200E,
300E
-
XC2S50E,
100E, 200E,
300E
-
-
62
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DS077-4 (2.3) June 18, 2008
Product Specification
XILINX [ XILINX, INC ]
