R
Spartan-IIE FPGA Family: Pinout Tables
TQ144 Pinouts (XC2S50E and XC2S100E)
(Continued)
TQ144 Pinouts (XC2S50E and XC2S100E)
(Continued)
Pad Name
LVDS
Async.
Output
Option
Pad Name
LVDS
Async.
Output
Option
VREF
Option
VREF
Option
Function
Bank
Pin
P56
P57
P58
Function
I/O, VREF
Bank 3, L10N
I/O (D4), L10P
I/O
Bank
Pin
I/O (DLL), L17P
I/O
4
4
4
-
-
-
-
-
3
P85 XC2S50E
All
3
3
-
P86 XC2S50E
-
-
-
-
-
-
I/O, VREF
Bank 4
All
P87
P88
P89
P90
P91
-
-
-
-
-
I/O, L16N_YY
I/O, L16P_YY
VCCINT
4
4
-
P59
P60
P61
P62
P63
P64
P65
P66
All
All
-
-
VCCINT
I/O (TRDY)
VCCO
-
3
-
-
GND
-
-
-
GND
-
I/O, L15N_YY
I/O, L15P_YY
I/O
4
4
4
4
All
All
-
-
XC2S100E
I/O (IRDY)
I/O
2
2
2
2
P92
P93
-
-
-
-
-
I/O, VREF
Bank 4
-
All
I/O (D3), L9N
P94 XC2S50E
P95 XC2S50E
-
I/O, VREF
All
I/O
4
4
4
-
P67
P68
P69
P70
-
-
-
-
-
Bank 2, L9P
I/O, L14N_YY
I/O, L14P_YY
GND
All
All
-
I/O
2
2
2
P96
P97
P98
-
-
-
-
I/O, L8N_YY
All
All
I/O (D2),
L8P_YY
GND
-
P99
-
-
-
DONE
3
-
P71
P72
P73
P74
-
-
-
-
-
-
I/O (D1), L7N
I/O, L7P
I/O
2
2
2
2
P100 XC2S50E
VCCO
P101 XC2S50E XC2S100E
PROGRAM
-
-
P102
P103
-
-
-
I/O (INIT),
L13N_YY
3
All
I/O, VREF
Bank 2
All
I/O (D7),
3
P75
All
-
L13P_YY
I/O
2
2
P104
P105
-
-
-
I/O
3
3
P76
P77
-
-
-
I/O (DIN, D0),
L6N_YY
All
I/O, VREF
Bank 3
All
I/O (DOUT,
BUSY),
L6P_YY
2
P106
All
-
I/O
3
3
3
-
P78
-
-
I/O, L12N
I/O (D6), L12P
GND
P79 XC2S50E XC2S100E
CCLK
VCCO
TDO
GND
TDI
2
-
P107
P108
P109
P110
P111
-
-
-
-
-
-
-
-
-
-
P80 XC2S50E
-
-
-
P81
P82
-
2
-
I/O (D5),
L11N_YY
3
All
-
I/O, L11P_YY
I/O
3
3
P83
P84
All
-
-
-
DS077-4 (2.3) June 18, 2008
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59
Product Specification
XILINX [ XILINX, INC ]
