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DS312_09 参数 Datasheet PDF下载

DS312_09图片预览
型号: DS312_09
PDF下载: 下载PDF文件 查看货源
内容描述: 的Spartan- 3E FPGA系列:介绍和订购信息 [Spartan-3E FPGA Family: Introduction and Ordering Information]
分类和应用:
文件页数/大小: 233 页 / 5527 K
品牌: XILINX [ XILINX, INC ]
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R
Functional Description  
+1.2V  
+3.3V  
SPI  
Serial  
Flash  
VCCINT  
P
P
HSWAP  
VCCO_0  
VCCO_0  
I
VCC  
DATA_IN  
VCCO_2  
MOSI  
+3.3V  
SPI Mode  
DIN  
DATA_OUT  
SELECT  
‘0’  
‘0’  
‘1’  
M2  
M1  
M0  
CSO_B  
WR_PROTECT  
HOLD  
W
‘1’  
Spartan-3E  
CLOCK  
Variant Select  
FPGA  
GND  
‘1’  
S
VS2  
VS1  
VS0  
+3.3V  
‘1’  
CCLK  
DOUT  
INIT_B  
+2.5V  
JTAG  
TDI  
+2.5V  
VCCAUX  
TDO  
+2.5V  
TDI  
TMS  
TCK  
TDO  
TMS  
TCK  
PROG_B  
DONE  
GND  
PROG_B  
Recommend  
open-drain  
driver  
DS312-2_46_082009  
Figure 53: SPI Flash PROM Interface for PROMs Supporting READ (0x03) and FAST_READ (0x0B) Commands  
S
Although SPI is a standard four-wire interface, various  
Figure 53 shows the general connection diagram for those  
SPI Flash PROMs that support the 0x03 READ command  
or the 0x0B FAST READ commands.  
available SPI Flash PROMs use different command proto-  
cols. The FPGA’s variant select pins, VS[2:0], define how  
the FPGA communicates with the SPI Flash, including  
which SPI Flash command the FPGA issues to start the  
read operation and the number of dummy bytes inserted  
before the FPGA expects to receive valid data from the SPI  
Flash. Table 53 shows the available SPI Flash PROMs  
expected to operate with Spartan-3E FPGAs. Other com-  
patible devices might work but have not been tested for suit-  
ability with Spartan-3E FPGAs. All other VS[2:0] values are  
reserved for future use. Consult the data sheet for the  
desired SPI Flash device to determine its suitability. The  
basic timing requirements and waveforms are provided in  
Serial Peripheral Interface (SPI) Configuration Timing in  
Module 3.  
Figure 54 shows the connection diagram for Atmel  
DataFlash serial PROMs, which also use an SPI-based pro-  
tocol. ‘B’-series DataFlash devices are limited to FPGA  
applications operating over the commercial temperature  
range. Industrial temperature range applications must use  
‘C’- or ‘D’-series DataFlash devices, which have a shorter  
DataFlash select setup time, because of the faster FPGA  
CCLK frequency at cold temperatures.  
Figure 57, page 84 demonstrates how to configure multiple  
FPGAs with different configurations, all stored in a single  
SPI Flash. The diagram uses standard SPI Flash memories  
but the same general technique applies for Atmel  
DataFlash.  
76  
www.xilinx.com  
DS312-2 (v3.8) August 26, 2009  
Product Specification  
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