R
Pinout Descriptions
Table 124: Types of Pins on Spartan-3E FPGAs (Continued)
Type /
Color Code
Description
Pin Name(s) in Type
CONFIG
Dedicated configuration pin. Not available as a user-I/O pin. Every package DONE, PROG_B
has two dedicated configuration pins. These pins are powered by
VCCAUX. See the Configuration section in Module 2 for details.
JTAG
GND
Dedicated JTAG pin. Not available as a user-I/O pin. Every package has
four dedicated JTAG pins. These pins are powered by VCCAUX.
TDI, TMS, TCK, TDO
Dedicated ground pin. The number of GND pins depends on the package GND
used. All must be connected.
VCCAUX
Dedicated auxiliary power supply pin. The number of VCCAUX pins
depends on the package used. All must be connected to +2.5V. See the
Powering Spartan-3E FPGAs section in Module 2 for details.
VCCAUX
VCCINT
VCCO
Dedicated internal core logic power supply pin. The number of VCCINT
pins depends on the package used. All must be connected to +1.2V. See
the Powering Spartan-3E FPGAs section in Module 2 for details.
VCCINT
VCCO_#
Along with all the other VCCO pins in the same bank, this pin supplies
power to the output buffers within the I/O bank and sets the input threshold
voltage for some I/O standards. See the Powering Spartan-3E FPGAs
section in Module 2 for details.
N.C.
This package pin is not connected in this specific device/package
N.C.
combination but may be connected in larger devices in the same package.
Notes:
1. # = I/O bank number, an integer between 0 and 3.
2. IRDY/TRDY designations are for PCI designs; refer to PCI documentation for details.
‘L’ indicates that the pin is part of a differential pair.
Differential Pair Labeling
I/Os with Lxxy_# are part of a differential pair. ‘L’ indicates
differential capability. The “xx” field is a two-digit integer,
unique to each bank that identifies a differential pin-pair.
The ‘y’ field is either ‘P’ for the true signal or ‘N’ for the
inverted signal in the differential pair. The ‘#’ field is the I/O
bank number.
"xx" is a two-digit integer, unique for each bank, that
identifies a differential pin-pair.
‘y’ is replaced by ‘P’ for the true signal or ‘N’ for the
inverted. These two pins form one differential pin-pair.
‘#’ is an integer, 0 through 3, indicating the associated
I/O bank.
The pin name suffix has the following significance.
Figure 80 provides a specific example showing a differential
input to and a differential output from Bank 1.
Pair Number
Bank Number
IO_L38P_1
Bank 0
IO_L38N_1
Positive Polarity
True Receiver
IO_L39P_1
Spartan-3E
FPGA
IO_L39N_1
Negative Polarity
Inverted Receiver
Bank 2
DS312-4_00_032409
Figure 80: Differential Pair Labeling
164
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DS312-4 (v3.8) August 26, 2009
Product Specification
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