R
Virtex-II Platform FPGAs: DC and Switching Characteristics
Source-Synchronous Switching Characteristics
The parameters in this section provide the necessary values for calculating timing budgets for Virtex-II source-synchronous
transmitter and receiver data-valid windows.
Table 45: Duty Cycle Distortion and Clock-Tree Skew
Speed Grade
Description
Duty Cycle Distortion(1)
Symbol
TDCD_CLK0
TDCD_CLK180
TCKSKEW
Device
All
-6
140
50
-5
140
50
-4
140
50
Units
ps
All
ps
Clock Tree Skew(2)
XC2V40
XC2V80
XC2V250
XC2V500
XC2V1000
XC2V1500
XC2V2000
XC2V3000
XC2V4000
XC2V6000
XC2V8000
50
50
60
ps
50
50
60
ps
50
50
60
ps
50
50
60
ps
80
80
90
ps
80
80
90
ps
100
100
400
500
100
100
400
500
600
110
110
450
550
650
ps
ps
ps
ps
ps
Notes:
1. These parameters represent the worst-case duty cycle distortion observable at the pins of the device using LVDS output buffers. For
cases where other I/O standards are used, IBIS can be used to calculate any additional duty cycle distortion that might be caused by
asymmetrical rise/fall times.
TDCD_CLK0 applies to cases where local (IOB) inversion is used to provide the negative-edge clock to the DDR element in the I/O.
TDCD_CLK180 applies to cases where the CLK180 output of the DCM is used to provide the negative-edge clock to the DDR element
in the I/O.
2. This value represents the worst-case clock-tree skew observable between sequential I/O elements. Significantly less clock-tree skew
exists for I/O registers that are close to each other and fed by the same or adjacent clock-tree branches. Use the Xilinx FPGA_Editor
and Timing Analyzer tools to evaluate clock skew specific to your application.
Table 46: Package Skew
Description
Package Skew(1)
Symbol
Device/Package
XC2V1000 / FF896
XC2V3000 / FF1152
XC2V3000 / BF957
XC2V4000 / FF1152
XC2V4000 / FF1517
XC2V4000 / BF957
XC2V6000 / FF1152
XC2V6000 / FF1517
XC2V6000 / BF957
Value
130
115
130
130
200
140
90
Units
ps
TPKGSKEW
ps
ps
ps
ps
ps
ps
105
105
ps
ps
Notes:
1. These values represent the worst-case skew between any two balls of the package: shortest flight time to longest flight time from Pad
to Ball (7.1ps per mm).
2. Package trace length information is available for these device/package combinations. This information can be used to deskew the
package.
DS031-3 (v3.5) November 5, 2007
Product Specification
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