R
Virtex-II Platform FPGAs: Pinout Information
Table 7: FG456/FGG456 BGA — XC2V250, XC2V500, and XC2V1000
Bank
3
Pin Description
IO_L52P_3
Pin Number
P18
No Connect in XC2V250
No Connect in XC2V500
NC
NC
NC
NC
NC
3
IO_L51N_3/VREF_3
IO_L51P_3
P22
P21
3
3
IO_L49N_3
P20
P19
3
IO_L49P_3
3
IO_L48N_3
R22
R21
R20
R19
R18
P17
3
IO_L48P_3
3
IO_L46N_3
3
IO_L46P_3
3
IO_L45N_3/VREF_3
IO_L45P_3
3
3
IO_L43N_3
T22
3
IO_L43P_3
T21
3
IO_L24N_3
T20
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
3
IO_L24P_3
T19
3
IO_L22N_3
U22
U21
U20
U19
T18
3
IO_L22P_3
3
IO_L21N_3/VREF_3
IO_L21P_3
3
3
IO_L19N_3
3
IO_L19P_3
U18
V22
V21
3
IO_L06N_3
3
IO_L06P_3
3
IO_L04N_3
V20
V19
3
IO_L04P_3
3
IO_L03N_3/VREF_3
IO_L03P_3
W22
W21
Y22
Y21
3
3
IO_L02N_3/VRP_3
IO_L02P_3/VRN_3
IO_L01N_3
3
3
W20
AA20
3
IO_L01P_3
(1)
4
4
IO_L01N_4/BUSY/DOUT
IO_L01P_4/INIT_B
AB19
AA19
DS031-4 (v3.5) November 5, 2007
Product Specification
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